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Unformatted text preview: UNIVERSITY OF CALIFORNIA College of Engineering
Depmment of Electrical Fxlgimering and Computer Sciences
Professor Oldham Fall 1999
EECS 40 —— MIDTERM #2
10 November 1999
Name: ' Student ID:
Last. First
TA: Cl Kusuma
CI Chang Guidelines: 1. Closed book and notes except 1 page of formulas.
You may use a calculator.
Do not unstaple the exam. Show all your work and reasoning on the exam in order to receive full or partial credit. 9'95“!" This exam contains 12 pages plus the cover page and 2 sheets of scratch paper included at the end of the
exam. You can remove these from the rest of the exam if you wish. Points Your
Problem Possible Score

—
5 What is the value of the unknown node voltage in each of the following circuits? Assume diodes are perfect rec—
tiﬁers " , (a) sv 10V _ ‘T'lv VAB — Lil:VCD= 77y (f) A crosssection for a CMOS chip is shoWn on the facing page. Some node voltages are indicated. Please tell
us what the values are for the node voltages at nodes U, W, R S. {6.133 UR.“ 5walUu~5V “OT TOM lpf'svw: Qv ' 10110 Prob l Worksheet 20f10 W
Shown on the opposite page is the layout and two cross—sections through a CMOS inverter. A list of components
follows. You are to indicate, by labelling, the location of that feature on the ﬁgure. The ﬁrst question is used as an example. 2.1mm W
(1) A contact to polysilicon [EXAMPLE] (a) well region
[(2) gate of NMOS transistor (b) ﬁeld oxide
(3) the W dimension of the PMOS transistor (c) NMOS gate oxide
(4) contact to ptype substrate ‘ (d) metal contact to PMOS source or drain
(5) metal contact to PMOS gate (e) poly on ﬁeld oxide
(6) spacing from n+ source gain areas to well mask (0 metal over ﬁeld oxﬂe
» (7) input electrode ' v (g) contact to NMOS source or drain
(8) output electrode . (h) oxide over polysilicon gate
2.1mm A possible list of masks for this process follows. You are to order the masks by simply ﬁlling in the mask num—
ber. It 15 possible that one or more masks 18 missing. If so, you must ﬁll out anew mask row for each missing mask
MASK# FUNCTION 4 (GI“—
a. (:33 _ '
® “a
n_ Deﬁne areas for gate oxide
Ital—
_ — ‘ Fill in mask #
here M! For this layout what do we expect for the relationship between gate delay for output rising (5110. and output
falling (tpHL)? Answer by putting in the correct symbol 1n the box (= > or <) Putsymbol here _ . ‘PLH ‘PHL
Why? MOS l? ‘> :5 LoMee 3of10 CMOS INVERTER Redrawn Layout
from SIMPLer O xide Mask
CF=Clear Field, DF = Dark Field 1 _
NOTEhn ‘6 answerng this
question, put numbers
ONLY on layout, and only letters on crosssections ‘3 ':':';'::::::::~. :::: u'u'u'n'r‘u'u'u'u'u'h'h'mgn'ra W
You are trying to construct a dc switch with an MOS transistor, as shown below. The idea: When input is low,
output high. But when input is high, output is hopefully low. V DD Note: For this transistor
= IOfF/In'n2 = lttF/cm2
m2 for electrons
V sec 11:1000c LOAD = 10pf (a) If VIN = 5V , what is the channel electron charge (coulombfcmzxfor small values of VOUT only)? _
Q 71 Cori (Vss“ VT) formula—4c” (W’s UT
T T It value 4'5 X '0‘;
w“ s
(b) If V1N = 5 V , what is the sheet resistance of the channel? (Again for the case in which VDUT is very small.) R n 1". '1' formula ‘Z 2 a
A; Q\ value Z2 Z JLZE] MEMO
loco (c) What is the value of VIN needed to produce an output of 0.1 V? 5" Mu. =>LK5=J $X=JK .lv— ——? X' 434* VIN: 9.5V
KERn 7“;er '*>RD=5'BUJ1/ﬂ
* W =7>Vos" ‘11": 3" (d) If the input suddenly switches ogw. and the load' 18 10 pF as shown, sketch the output voltage versus time
(accurately) and estimate the time At for the output to go from 0.1 V to 2. 45V (halfway to 5 V). “ALFDuh? a) At=.6‘( RC At: 33,8 nsec 50t10 (d) time 60110 A CMOS inverter drives an offchip capacitance load, as shown below. All you know about the MOS transistors
is shown in the graphs. (DO NOT ASK{Or more information!) ,
. y’Ime‘A) "V35? . t / i 'Vosp — 3V ’VCSp .. 2v 'VGSp _ 1v
‘VDSp was .. 3v —VGS = 2V —vGS = 1V
VDSn (a) Draw the circuit model (in the box provided on opposite page) for the circuit (replacing transistors with
appropriate simpler elements, such as voltage sources, current sources, resistors, capacitors, inductors) when VlN = 3V . .No numerical values are required in part (a). _(b) Suppose V1N suddenly switches to 0V at t = 0" . Draw the new circuit model in the box provided (again
with simpler elements). Show both the general form an_=d the numerical values for all parameters. (c) Sketch the form of VOUT versus time for t = 0+ to t 4) no on the axes provided. (No numbers needed.) ((1) What is the time delay for VOUT to go to VDD/Z (in n sec)?
'1 = Ry x CQAD’
0.68 I , 2. 5‘3 A: ll (e) At what time does VOUT equal 1 V (in n sec)? VowtCt) 2 ‘3 , 3 e—wt 1:" == ‘3 6363*" V
LOH x‘C. _ 70f10 (a) (b) (c) PUT CIRCUIT
HERE —>
for VIN = 3V PUT CIRCUIT for VIN = 0 (RP $7917..
'_ VW': 3VW 12m “37’5le 80f10 W
(a) You open Up your Robot Kit and ﬁnd the following circuit. You suspect it is a linear voltage ampliﬁer. You
know the differential ampliﬁer has very high internal gain. (3.1) Is it a linear ampliﬁer? ‘ Vo
(a. 2) If so, what 15 the voltage gain  °? [If not, ignore (a. 2). ] (8.3) If not, why not? Linear ampliﬁer? ‘ or No) V. V
' 0
signal 333KB +  ail; +5.2v_, . , Av 5 "\7'. = Z O
o to +250 mV Rail = 0v ‘
_ A“ v Lﬂqo ‘+ “1"0 20 If not, why not?
to
(b) You also ﬁnd the following circuit. Again you suspect a linear ampliﬁer. You know the differential ampli
ﬁer has very high internal gain ”’ (b. 1)Is it a linear ampliﬁer?
(b. 2) If so what 15 the voltage gain? [If not, ignore (b. 2). ]
(b. 3) If not, why not? '500K_ V.
O to 3:51.21ng Linear ampliﬁer? Yes or V. V ‘L—@’— V AV 5 —9  ‘ +Rail = +5.2V Vi M 03" 9  411mg ov _
I If not, why not? f‘ F EEC} B ‘C k
(Arr a. M 1. s) (c) Carefully sketch the curve of V001" versus VIN for circuit (a) on the graph axes provided for
, osviszsomv. (d) Carefully sketch the curve of VOUT versus VIN ' for circuit (b) on the graph axes provided for
o sv‘i s 250mV.
90f10 (e) (d) .
, _—.,— ..4... . ,DK 500K 9%.”; W W
Vx: Swim P‘l" OFg 1V w‘ﬁ:
H vi '= {104 v ' mono ...
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 Electrical Engineering

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