Electrical Engineering 40 - Fall 2001 - Oldham - Midterm 2

Electrical Engineering 40 - Fall 2001 - Oldham - Midterm 2...

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Unformatted text preview: EECS40, MIDTERM #2, FALL 2001 EECS40, FALL/2001 MIDTERM #2 Professor Oldham Closed book and notes except 1 page of formulas. You may use a calculator. Do not unstaple the exam. Show all your work and reasoning on the exam in order to recieve full or partial credit. This exam contains 6 problems and corresponding worksheets plus the cover page. Do not ask questions during the exam. If you believe there is an error, please point it out. If you believe there is an ambiguity, explain your interpretation in your answer. NMOS Equations: if VDS>VDSSAT ID = IDS (1 + lambda VDS) ID = kVS W/L (VGS-VT) Problem #1 file:///C|/Documents%20and%20Settings/Jason%20Raf...%20Fall%202001%20-%20Oldham%20-%20Midterm%202.htm (1 of 13)1/27/2007 5:21:16 PM EECS40, MIDTERM #2, FALL 2001 Shown below is the layout of a CMOS circuit. The mask boundaries are indicated in a few places. The connection to ground (VSS),(VDD), the output F, and the two inputs A and B are identified on the layout. A cross section through X-X is also shown below, and the materials are identified. (a)Draw the circuit diagram and rearrange it to be a reasonably neat drawing. Obviously, the drawing should contain only NMOS and PMOS transistors and wires. You must, of course, label the inputs, outputs, and power supply connections. (b)Write the truth table for the logic circuit. (Voltage of VDD means logical 1.) Problem 1 Answer sheet (a) file:///C|/Documents%20and%20Settings/Jason%20Raf...%20Fall%202001%20-%20Oldham%20-%20Midterm%202.htm (2 of 13)1/27/2007 5:21:16 PM EECS40, MIDTERM #2, FALL 2001 (b) Problem #2 On the page opposite, you are to lay out a PMOS transistor with W=1um, L=0.25um. Note that a grid is provided with a grid spacing of 0.25um. Aslo note that the drawing conventions are shown; you must use these symbols in your layout. (For example, draw contacts as a box with an X from corner to corner, and draw the polysilicon mask with simple dashed lines.) For simplicity, do not show contacts to the body or well and do not show the location of the select masks....
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Electrical Engineering 40 - Fall 2001 - Oldham - Midterm 2...

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