1
ECE 315 Homework 7 Solution
Fall 2007
1.
(Simple CS amplifier design)
An NMOS amplifier is to be designed to provide an output voltage
centered at 1.5V with 0.5V peaktopeak variation across a
R
D
=50k
Ω
load in the circuit below.
(a)
If a smallsignal gain of 5V/V is needed, what
g
m
is required if
r
o
of the NMOSFET can be
ignored?
(2 pts)
If we ignore
r
o
of the NMOS, then the small signal
A
V
is
–g
m
R
D
for the CS amplifier.
We will not
deal with the negative sign here explicitly, since in smallsignal circuits that is just a constant phase
shift.
Therefore
g
m
= 5/50k
Ω
= 0.10mS.
(b)
For
V
DD
=3V, what values of
I
D
and
V
OV
will you choose for the output center point?
(4 pts)
The center point has the output at 1.5V, and therefore the current will be (3.0 – 1.5)/50k
Ω
=
0.030mA.
For the given gm in (a), we will need a
V
OV
of 0.6V.
(c)
What
W/L
ratio is required if
k
n
’
=
μ
n
C
ox
= 0.1mA/V
2
?
(2 pts)
For the largesignal current in saturation ignoring the Early effect, we have
2
'
2
1
OV
n
D
V
k
L
W
I
⎟
⎠
⎞
⎜
⎝
⎛
=
, which gives 1.67 or
(W/L)
= 5/3.
Additional info: The
W/L
is often given in scalable numbers in technology whose minimal definable
dimension is
2
λ
. This
2
λ
is
called the gate pitch, which is the naming convention of the technology,
i.e., 65nm CMOS technology means the distance between two closely packed gate is 65nm (see
below).
In digital circuits, we usually work with L=2
λ
, and a wide transistor denoted as 200
λ
/2
λ
or
simply 200/2.
In analog circuits, due to the concerns of a larger VA, we often have the minimal
transistor length at 3
λ
.
The answer 5/3 above is a typical minimalsized transistor in analog circuits
(while in digital circuits it will be 3/2).
(d)
If
V
th
=0.8V, what is the largesignal
V
GS
and
V
DS
as the
Q
point?
(2 pts)
V
OV
=0.6V, therefore,
V
GS
= 1.4V.
V
DS
is at 1.5V as previously presented.
This is the Q point.
(e)
For
v
O
to swing between 1.25V and 1.75V, what is the corresponding
v
gs
swing?
(2 pts)
Check
if the transistor is always in saturation.
(2 pts)
2
λ
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2
We have a gain of 5 at the Q point, so the
v
gs
has a swing of 0.1V.
The largesignal
V
GS
is from
1.35V to 1.45V.
V
DS
at 1.25V and 1.75V is always larger than the gate overdrive in this range, and
hence the transistor is always in saturation.
The careful student can check if the smallsignal calculation corresponds well with the largesignal
calculation.
At the largesignal
V
GS
=1.35V,
I
D
=0.025mA, and
v
O
= 3.0 – 50k
Ω×
0.0252 = 1.74V.
At
V
GS
=1.45V,
I
D
= 0.0352mA and
v
O
= 3.0– 50k
Ω×
0.0352 = 1.24V.
This is VERY close to the
expected values.
(f)
For
v
O
at 1.25V and 1.75V, what is the
g
m
and
A
v
variation (the nonconstant
g
m
here will cause
a nonlinear distortion between input and output)?
(4 pts)
When
v
O
is at 1.25V,
I
D
= 0.035mA, and
V
OV
=
0.55V.
g
m
= I
D
/(V
OV
/2)
= 0.127mS.
A
v
=g
m
R
D
=6.35.
When
v
O
is at 1.75V,
I
D
= 0.025mA, and
V
OV
=
0.65V.
g
m
= I
D
/(V
OV
/2)
= 0.077mS.
A
v
=g
m
R
D
=3.85.
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 Fall '07
 SPENCER
 Amplifier, Microelectronics, Volt, Trigraph, Input impedance, Impedance matching, Early effect

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