sol3 - Chapter 3 3.1 a x 1 x 2 x 3 f 1 1 1 1 1 1 1 1 1 1 1...

Info iconThis preview shows pages 1–7. Sign up to view the full content.

View Full Document Right Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Chapter 3 3.1. ( a ) x 1 x 2 x 3 f 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ( b ) #transistors = NOT gates × 2 + AND gates × 8 + OR gates = 3 × 2 + 4 × 8 + 1 × 10 = 48 3.2. ( a ) In problem 3.1 the canonical SOP for f is f = x 1 x 2 x 3 + x 1 x 2 x 3 + x 1 x 2 x 3 + x 1 x 2 x 3 This expression is equivalent to f in Figure P3.2, as derived below. x 1 x 2 x 3 x 3 x 2 x 3 x 2 x 3 + x 2 x 3 x 2 x 3 + x 1 x 2 x 3 x 1 x 2 x 3 + + x 1 x 2 x 3 x 1 x 2 x 3 + ( b ) Assuming the multiplexers are implemented using transmission gates #transistors = NOT gates × 2 + MUXes × 6 = 1 × 2 + 3 × 6 = 20 3-1 3.3. ( a ) A SOP expression for f in Figure P3.3 is: f = ( x 1 ⊕ x 2 ) ⊕ x 3 = ( x 1 ⊕ x 2 ) x 3 + ( x 1 ⊕ x 2 ) x 3 = x 1 x 2 x 3 + x 1 x 2 x 3 + x 1 x 2 x 3 + x 1 x 2 x 3 which is equivalent to the expression derived in problem 3.2. (b) Assuming the XOR gates are implemented as shown in Figure 3.61 b #transistors = XOR gates × 8 = 2 × 8 = 16 3.4. Using the circuit The number of transistors needed is 16. 3.5. Using the circuit The number of transistors needed is 20. 3.6. ( a ) x 1 x 2 x 3 f 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 3-2 ( b ) The canonical SOP expression is f = x 1 x 2 x 3 + x 1 x 2 x 3 + x 1 x 2 x 3 + x 1 x 2 x 3 + x 1 x 2 x 3 The number of transistors required using only AND, OR, and NOT gates is #transistors = NOT gates × 2 + AND gates × 8 + OR gates × 12 = 3 × 2 + 5 × 8 + 1 × 12 = 58 3.7. ( a ) x 2 x 3 x 4 f 1 1 1 1 1 1 1 1 1 1 1 x 1 1 1 1 x 2 x 3 x 4 f 1 1 1 1 1 1 1 1 1 1 x 1 1 1 1 1 1 1 1 1 1 1 1 ( b ) f = x 1 x 2 x 3 x 4 + x 1 x 2 x 3 x 4 + x 1 x 2 x 3 x 4 = x 1 x 3 x 4 + x 2 x 3 x 4 The number of transistors required using only AND, OR, and NOT gates is #transistors = NOT gates × 2 + AND gates × 8 + OR gates × 4 = 4 × 2 + 2 × 8 + 1 × 4 = 28 3.8. V DD V x 1 V x 2 V x 3 V f 3-3 3.9. V x 1 V x 3 V x 4 V x 2 V f 3.10. Minimum SOP expression for f is f = x 2 x 3 + x 1 x 3 + x 2 x 4 + x 1 x 4 = ( x 1 + x 2 )( x 3 + x 4 ) which leads to the circuit V DD V x 1 V x 2 V x 3 V f V x 4 3.11. Minimum SOP expression for f is f = x 4 + x 1 x 2 x 3 which leads to the circuit 3-4 V DD V x 1 V x 3 V f V x 4 V x 2 3.12. V DD V y V z V f V x V DD 3-5 3.13. V DD V y V z V y V z V x V f V DD V z V y V x V y V z 3.14. ( a ) Since V DS ≥ V GS- V T the NMOS transistor is operating in the saturation region: I D = 1 2 k n W L ( V GS- V T ) 2 = 10 μ A V 2 × 5 × (5 V- 1 V) 2 = 800 μ A ( b ) In this case V DS < V GS- V T , thus the NMOS transistor is operating in the triode region: I D = k n W L ( V GS- V T ) V DS- 1 2 V 2 DS = 20 μ A V 2 × 5 × (5 V- 1 V) × . 2 V- 1 2 × (0 . 2 V) 2 = 78 μ A 3.15. ( a ) Since V DS ≤ V GS- V T the PMOS transistor is operating in the saturation region: I D = 1 2 k p W L ( V GS- V T ) 2 = 5 μ A V 2 × 5 × (- 5 V + 1 V) 2 = 400 μ A ( b ) In this case V DS > V GS- V T , thus the PMOS transistor is operating in the triode region: I D = k p W L ( V GS- V T ) V DS- 1 2 V 2 DS = 10 μ A V 2 × 5 × (- 5 V + 1 V) × (...
View Full Document

This note was uploaded on 03/26/2008 for the course ECEN 248 taught by Professor Lu during the Spring '08 term at Texas A&M.

Page1 / 22

sol3 - Chapter 3 3.1 a x 1 x 2 x 3 f 1 1 1 1 1 1 1 1 1 1 1...

This preview shows document pages 1 - 7. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online