project1 - Page 1 Parallel Instruction Pipeline Processor...

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Parallel Instruction Pipeline Processor Developed by Brad Smith – 50% Apurv Kumaria – 50% Page 2
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Overview This paper will cover the inspiration, development, and testing of the Parallel Instruction Pipeline Processor that was developed for this project. At the end, the code from each of the five blocks, the overall project code, and the code for pieces that have been changed from the original concept of pipeline in our book has been included. The Parallel Instruction Pipeline Processor (PIPP) makes use of the pipeline processor's ability to run through multiple instructions at once and takes it a step further. It runs two instructions in parallel at each step, meaning that at it's peak efficiency, it will run twice as fast as a normal pipeline processor, while at it's lowest operating speed, slowed by hazards and bubbles, the PIPP will run as fast as the normal pipeline processor. In order, this paper will discuss how the concept for the PIPP was developed, the instruction set that was developed for the processor, the design of each individual unit, the hazards and forwarding that need to be taken into account, the testing performed, and finally various thoughts on the project, partnership, and learning both from this project and in the class in general. Initial Development When we were asked to begin thinking about what type of application we would like our processor to be used for, we were stumped. Computers are a part of our every day lives now, both in our everyday life and our schoolwork, especially with the career path we have chosen. Our first impulse was to lean towards the mainstay of our lives before and during our time at Iowa State, gaming. We are both avid computer gamers, so we immediately began to look into the types of processors that best help in the running of computer games. It did not take long before we came across Page 3
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the idea of a Dual-Core processor. Obviously, this was a little beyond what we are able to do, but we decided to take that idea and run with it. With a little planning, we realized we would be able run two instructions at the same time, or essential run two processors simultaneously. It would cost nearly twice as much as a normal pipeline processor, but we knew that for computer gaming, the price would be high since we would be developing for performance and not for cost. While the Dual-Core processor was our inspiration, we realized it was not exactly what we are trying to implement, it would be more along the lines of a Superscalar Processor. There would be two instructions coming out of the instruction memory, and they both would travel to the register file. Four outputs would come from this unit and travel into the Execution phase where there would be two ALUs and two Shifters to handle the two instructions. These would then pass onto the memory, where they both could be written to two different or the same address, and finally could be written back into different or the same register. We wanted to make sure our data memory and our register file were
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