PCI_Express.pdf - PCI Express PCI Express(Peripheral Component Interconnect Express officially abbreviated PCI Express as PCIe or PCI-e[1 is a

PCI_Express.pdf - PCI Express PCI Express(Peripheral...

This preview shows page 1 - 3 out of 22 pages.

PCI Express Year created 2004 Created by Intel · Dell · HP · IBM Supersedes AGP · PCI · PCI-X Width in bits 1–32 No. of devices One device each on each endpoint of each connection. PCI Express switches can create multiple endpoints out of one endpoint to allow sharing one endpoint with multiple devices. Speed For single-lane (×1) and 16-lane (×16) links, in each direction: v. 1.x (2.5 GT/s): 250 MB/s (×1) 4 GB/s (×16) v. 2.x (5 GT/s): 500 MB/s (×1) 8 GB/s (×16) v. 3.x (8 GT/s): 985 MB/s (×1) 15.75 GB/s (×16) v. 4.x (16 GT/s): 1.969 GB/s (×1) 31.51 GB/s (×16) v. 5.x (32 GT/s): 3.938 GB/s (×1) 63 GB/s (×16) Style Serial PCI Express PCI Express ( Peripheral Component Interconnect Express ), officially abbreviated as PCIe or PCI-e , [1] is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X, and AGP bus standards. PCIe has numerous improvements over the older standards, including higher maximum system bus throughput, lower I/O pin count and smaller physical footprint, better performance scaling for bus devices, a more detailed error detection and reporting mechanism (Advanced Error Reporting, AER [2] ), and native hot-swap functionality. More recent revisions of the PCIe standard provide hardware support for I/O virtualization. The PCI Express electrical interface is also used in a variety of other standards, most notably the laptop expansion card interface ExpressCard and computer storage interfaces SATA Express and M.2. Format specifications are maintained and developed by the PCI-SIG (PCI Special Interest Group), a group of more than 900 companies that also maintain the conventional PCI specifications. PCIe 3.0 is the latest standard for expansion cards that are in production and available on mainstream personal computers. [3][4] Architecture Interconnect Lane Serial bus Form factors PCI Express (standard) Pinout Power PCI Express Mini Card Physical dimensions Electrical interface Mini-SATA (mSATA) variant Mini PCIe v2 PCI Express External Cabling Derivative forms History and revisions PCI Express 1.0a PCI Express 1.1 PCI Express 2.0 PCI Express 2.1 PCI Express 3.0 PCI Express 3.1 PCI Express 4.0 PCI Express 5.0 Extensions and future directions Hardware protocol summary Physical layer Contents
Image of page 1
Hotplugging interface Yes, if ExpressCard, Mobile PCI Express Module, XQD card or Thunderbolt External interface Yes, with PCI Express External Cabling, such as Thunderbolt Website pcisig.com Data transmission Data link layer Transaction layer Applications External GPUs Storage devices Cluster interconnect Competing protocols See also Notes References Further reading External links Conceptually, the PCI Express bus is a high-speed serial replacement of the older PCI/PCI-X bus. [6] One of the key differences between the PCI Express bus and the older PCI is the bus topology; PCI uses a shared parallel bus architecture, in which the PCI host and all devices share a common set of address, data and control lines. In contrast, PCI Express is based on point-to-point topology, with separate serial links connecting every device to the root complex (host). Due to its shared bus topology,
Image of page 2
Image of page 3

  • Left Quote Icon

    Student Picture

  • Left Quote Icon

    Student Picture

  • Left Quote Icon

    Student Picture