homework5 - power. Flash Programed by system voltages, long...

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CprE 488 Embedded Systems Design Homework 5, Fall 2006 Name: Brad Smith Lab Section: Tuesday 6-9 NOTE : You are required to use Microsoft Visio to draw UML diagrams. The software is available on departmental machines. A free copy is available to ISU students for use at home. 4. [15] Q4-1. Draw a UML sequence diagram that shows a four-cycle handshake between a bus master and a device. M a s t e r : D e v i c e : R e a d y t o S e n d R e a d y t o R e c i e v e D o n e S e n d i n g D a t a D o n e R e c i e v i n g D a t a
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4. [15] List the types of memories available to embedded systems design; and summerize the pros and cons of each type in a couple of sentences. DRAM – Consumes small amounts of power, must be refreshed. SRAM – The faster of the two RAMs, but consumes a higher amount of
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Unformatted text preview: power. Flash Programed by system voltages, long erasure time, cannot erase small parts. Must be erased in blocks. 4. [15] Q4-10. Draw a timing diagram that shows a complete DMA operation, including handing off the bus to the DMA controller, performing the DMA transfer, and returning bus control back to the CPU. 4. [15] Q4-17. Draw a UML sequence diagram for a read transaction that includes a DRAM refresh operation. The sequence diagram should include the CPU, the DRAM interface, and the DRAM internals to show the refresh itself. C P U : D R A M I n t e r f a c e : D R A M I n t e r n a l : R e a d C E = 0 R A S = 0 R o w A d d r e s s C A S = 0 C o l u m n A d d r e s s C E = 1 C A S = 0 R A S = 0 D a t a R e a d...
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homework5 - power. Flash Programed by system voltages, long...

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