Tufts University
School of Engineering
Department of Electrical and Computer Engineering
ES4  Introduction to Digital Circuits
Spring 2008
Lab Section: Tuesday
3:006:00pm
Experiment 3
2Bit Adder
Name:
Teddy Portney
[email protected] tufts.edu
Submitted to:
James Pringle
Experiment Performed:
March 4, 2008
Experiment Due:
March 11, 2008
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I.
PURPOSE
The purpose of this experiment was to provide a more indepth implementation of
the hardware description language VHDL, as well as the program Xilinx ISE. This
experiment also provided an opportunity to demonstrate further skill in traversing the
process from a functional specification all the way to a circuit that performs the
desired task.
I.
INTRODUCTION
It is very common for engineers to be assigned a task, such as the one in this lab,
which was to design two fulladder circuits and implement them by cascading them
together with the end objective of adding two twobit numbers. The process through
which an engineer must travel is fairly intensive, and involves several steps. The first
step requires the designing of a truth table. Since the engineer will probably be given
at least a good idea of how many inputs the circuit will need, they can easily calculate
the number of possible combinations for such a truth table by using the formula
which states that the number of rows in a truth table is equal to 2
N
, where N is the
number of inputs. With some specifications, there will only be one column of outputs,
which makes the rest of the process very trivial. However, in most cases, there will be
more than one column, which greatly increases the amount of time needed to deduce
an answer, and increases the likelihood of making an error and not noticing.
After creating an accurate truth table, each column of outputs is considered its
own function. Here, it is obvious why tables with one output column make life much
simpler. For each output column, the function can be written in canonical form very
easily by looking at the truth table. This only requires looking at where the function
produces an output of “1” and writing the number of the corresponding minterm in
sumofproducts form.
From the SOP canonical forms of these functions, it is easy to create KMaps, one
for each function, in an attempt to minimize the functions. Again, there is a formula
relating the number of squares required for the KMap and the number of input
variables. Again, this relationship is 2
N
, where N is the same as in the previous
formula, the number of variables. After the KMap is filled in, largest groups of “1” ‘s
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 Spring '08
 Panetta
 Logic gate, Xilinx

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