co4_part2_floorplan_placement (2).ppt

# co4_part2_floorplan_placement (2).ppt - CO4 Physical Design...

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CO4 - Physical Design

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Outline VLSI physical design steps Partitioning Floorplanning Placement Routing
VLSI design ﬂow with detailed physical design steps Physical design is the process of generating the physical layout of the VLSI circuit from the schematic or gate level netlist. design phase typically starts after the logic design and verification steps mainly consists of four steps, namely, partitioning, ﬂoorplanning, placement, and routing

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Partitioning Partitioning is a process by which the entire VLSI circuit is divided into a smaller number of sub-circuits. The partitioning is done such that the number of interconnections between the sub-circuits are minimum. Typically, the entire circuit is partitioned into a number of blocks based on the functionality.
Floorplanning Topics Goals, Inputs and Objectives Floorplanning Types Slicing Floorplan Skewed slicing tree Non-skewed slicing tree Non-slicing Floorplan Floorplanning Algorithms Simulated Annealing Wong–Liu Algorithm Shape Function Evaluation Genetic Algorithm for Floorplanning Input/Output Planning, power Planning, clock Planning Floorplanning Guidelines

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Floorplanning Goals To arrange the blocks on the chip To decide the I/O pad locations To decide the number of power pads and their locations To decide the power distribution style To decide the clock distribution and their locations Inputs A hierarchical netlist of the design which contains all blocks along with their area and connectivity information Pin location of each block Information whether the blocks are fixed or ﬂexible blocks Objectives Minimize the die area Reduce the interconnect length (especially for critical nets) Maximize routability Determine the shapes of ﬂexible blocks
Netlist contains all the functional and control logic cells and blocks, memory blocks, registers and describes the input and output ports of each block and the connectivity between the blocks. Consider a multi function circuit which has 6 major blocks three registers A,B,C one functional unit (ALU) one control unit (CU) and one multiplexer unit(MUX).

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The whole circuit is partitioned into six major blocks. Each block is represented by a rectangle which has a fixed amount of area requirement. Two different ﬂoorplans During the ﬂoorplanning, it is required to know if any block is ﬂexible or fixed. A flexible block is normally made of standard cells; hence, their size is fixed, but they can be rearranged so that the block shape is ﬂexible, whereas fixed blocks are not alterable. So, after placing the fixed blocks, the ﬂexible blocks can be placed at the vacant areas.
Floorplanning types Two types of ﬂoorplanning classes are normally used : Slicing ﬂoorplanning Non-slicing ﬂoorplanning Slicing ﬂoorplan In slicing ﬂoorplan, the whole die area is first partitioned

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• Winter '16
• tulasi kumar
• Electronic design automation, Clock distribution network, Floorplanning

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