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# mid.f91 - Name Page 1 of 9 CS/ECE 552 Introduction to...

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Name:_____________________________________ Page 1 of 9 CS/ECE 552 Introduction to Computer Architecture Midterm Exam Thursday, October 24, 1991 7:15-9:15 p.m Name:_________________________________________________________________________ Limit your answers to the space provided. Unnecessarily long answers will be penalized. If you use more space than is provided, you are probably doing something wrong. Use the back of each page for any scratch work. Write your last name on each page. Problem 1. ______________ (out of 18 points) Problem 2. ______________ (out of 18 points) Problem 3. ______________ (out of 8 points) Problem 4. ______________ (out of 10 points) Problem 5. ______________ (out of 10 points) Problem 6. ______________ (out of 17 points) Problem 7. ______________ (out of 20 points) Total ______________ (out of 101 points)

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Name:_____________________________________ Page 2 of 9 (1) Micro-operation Control Sequences (18 points) Consider the data path of a CPU as shown below. STATUS A R N - 1 R 0 ACC MAR MDR IR PC BUS A BUS B ALU The ONLY valid register transfers, and other operations are shown in the table below. Furthermore, one and only one transfer/operation may be carried out in a given clock cycle. (Note that there is no direct path between bus A and bus B; such transfers must go through the ALU). Operation/Transfer Number Operation/Transfer Semantics 1 PC [PC] + 1; done through the ALU 2 PC [A] 3 ACC [A] + [ACC] 4 IR [A] 5 ACC [A] + [ R i ] 6 ACC [A] 7 R i [A] 8 A [MDR] 9 A [ACC] 10 A [ R i ] 11 A [PC] 12 MDR [A]; Write Memory Start 13 Read Memory Start 14 MAR [PC] 15 MAR [ACC] 16 MAR [ R i ] 17 Wait for Memory Function Complete (WMFC) 18 Clear A 19 END
Name:_____________________________________ Page 3 of 9 (i) Write a sequence of control microoperations to fetch from memory and execute the following two-word instruction: Word 1 Opcode R j and mode R k and mode Word 2 Displacement The opcode is ADD, and the semantics (meaning) of the instruction are as follows: Add the contents of the memory word whose address is obtained by adding the "Displacement" specified in word 2, to the contents of register R j , to the contents of the word that is indirectly addressed by R k ( i.e., R k contains the effective address of the second operand as well as the result). The machine is word addressable, and only one word is fetched at a time. To assist you in your answer, the first few transfers/operations are given below. (12 points) 14, 1, 13, 17, 8, 4, (ii) For the data path, indicate in which steps the following gates will be opened. For example, the steps in which the gate MAR IN is opened are: MAR IN : 14, 15, 16 (a) ACC OUT :

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mid.f91 - Name Page 1 of 9 CS/ECE 552 Introduction to...

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