ICAR_Lab_09_PicoBlaze(2).pdf

ICAR_Lab_09_PicoBlaze(2).pdf

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Introduction to Computer Architectures 1 ICAR Laboratory : PicoBlaze Lab 2 The aims of this lab are to introduce the instructions required to access external memory and the programming constructs required to design an assembly language program. The processor we shall be using is Xilinx’s PicoBlaze processor, an 8bit processor, as described in the previous lab. Figure 1: PicoBlaze 3 memory configuration The PicoBlaze processor uses a Harvard memory architecture i.e. physically separate memories for instructions and data, as shown in figure 1. Data can not be stored in the instruction memory, therefore, the PicoBlaze instruction set does not include instructions to read or write to this memory i.e. all data must be stored in data memory, or its internal scratch-pad memory. To access data stored in external data memory two instructions are supported: RDPRT and WRPRT . Note , in the PicoBlaze the Data memory's address and data buses are called Ports i.e. Port address and Port data, don't get confused with the instructions RDMEM and WRMEM , these are used to read/write to the processor's internal scratch-pad memory. Task 1 Launch the FIDEx instruction set simulator (ISS) and create a new project call lab2 , as described in the first PicoBlaze lab script. Click on the right hand side Help tab (shown in figure 2), selecting: Coding Manual -> Instruction set Figure 2: instruction set Scroll down the list until you get to the Move Data section. You should see two Mike Freeman 26/01/2017
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Introduction to Computer Architectures 2 versions of the RDPRT and WRPRT instructions listed i.e. using absolute, or register indirect addressing modes. Left click on each instruction to read its description. To return back to the previous page left click on the icon. Note , addressing modes define how an instruction accesses its operands, some typical examples are shown below: Instruction RTL description Addressing mode LOAD s0, 100 s0 <- 100 immediate ADDC s1, s2 s1 <- s1 + s2 + Cy register RDPRT s3, 123 s3 <- MEM[123] absolute WRPRT s4, (s5) MEM[s5] <- s4 register indirect The Register Transfer Level (RTL) description describes what storage elements are accessed by an instruction. The <- symbol is read as 'updated with'. Memory is represented as an array e.g. MEM[10] will reference the data stored at address 10 in memory device MEM . Enter the assembly language program below, storing it to the file lab2.psm . DON'T try to simulate this program as data memory has not been configured in the simulator i.e. you will get the wrong result. Make sure you understand what each instruction does and what the different values of 0x10 represent in this program. Refer to the FIDEx Help menu for a more detailed description of each instruction.
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  • Winter '19
  • oussama jadayel
  • Computer Architecture, Central processing unit, Machine code, Addressing mode, Mike Freeman

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