Lab2Answers.pdf

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Introduction to Computer Architectures 1 ICAR Laboratory Answers : HW Lab 1 Task 1 As script Task 2 What logic state corresponds to the OPEN and CLOSED traps states? OPEN = Logic '0' CLOSED = Logic '1' Task 3 What combination of switch positions will cause the Solenoid to be triggered? Both switches need to be outputting a logic '1' Task 4 What logic state causes the base LEDs to be illuminated? LED on = Logic '1' LED off = Logic '0' What do the sensor output states ‘1’ and ‘0’ correspond to i.e. covered / uncovered? Covered = Logic '1' Uncovered = Logic '0' Additional Task the control logic's output signal (Enable) should be logically ANDed with the OSC signal. Then when the control logic enables the Solenoid this final AND gate's output will turn on / off as the OSC signal turns on / off i.e. Solenoid = OSC AND Enable Task 5 Which logic circuits implement a three input logical AND function? Which three
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  • Winter '19
  • oussama jadayel
  • Logic gate, logic state, Mike Freeman

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