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Introduction to Computer Architectures 1 ICAR Laboratory Answers : PicoBlaze Lab 1 Task 1 Question : how many different address and data buses are needed in this processor? The picoblaze is uses a Harvard architecture so it has a an Instruction memory address/data bus and a Data memory address/data bus. However, it also has two other memories, a scratch pad memory and a stack memory, each requiring a separate address/data bus. Question : edit this code to use decimal, binary and octal values, then re-simulate your program to confirm you get the same result i.e. the value 30 in register s2. 10 = 0x0A = b00001010 = \12 20 = 0x14 = b00010100 = \24 30 = 0x1E = b00011110 = \36 Task 2 Mike Freeman 16/01/2017

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Introduction to Computer Architectures 2 The PicoBlaze is an 8bit processor i.e. its internal data registers and ALU (adder) are 8bits. However, we still may want to perform addition operations on larger numbers (data types) i.e. 16, 24, or 32bits etc, in order to represent a larger range of values. Therefore, to allow the processor to work on data values larger than its default data width these have to be broken down into 8bit blocks. When performing binary arithmetic we only consider one bit position column at a time, working from LSB to MSB, therefore breaking a larger number up into smaller blocks does not affect this process, the only thing we must ensure is that any carry bit is passed to the next 8bit block addition. This carry information is automatically stored in the CY (carry) flag
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• Winter '19
• Computer Architecture, Central processing unit, Status register, Carry flag

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