Lab14Answers.pdf

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Introduction to Computer Architectures 1 Answers ICAR Software Laboratory : MIPS Lab 1 Task 1 .text Start: DADDI r1,r0,0x0A ;1 DADDI r2,r0,0x14 ;2 DADD r3,r1,r2 ;3 can not proceed until r2 updated DADD r4,r0,r3 ;4 can not proceed until r3 updated Finish: Halt The last two instructions have data dependencies. Note, unlike the simple PicoBlaze processor an instruction does not complete before the next instruction is fetched. Instruction 2 will not have written the value 0x14 to register r2 before instruction 3 tries to read it, therefore instruction 2 must be stopped ‘stalled’ until this data has been updated. The same is true for instructions 3 and 4. Task 2 Question : Why are the execution of some instructions stalled i.e. are not issued to the execution stages? Answer : as above to prevent instructions reading old data i.e. reading data that has not been updated with its new value. Task 3 A = NOT [ ( B AND NOT C) OR (NOT B AND C) ] D E A=R1, B=R2, C=R3, D=R4, E=R5 .text Start: DADDI R2, R0, 0x01 ;load data B DADDI R3, R0, 0x00
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