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4180t1es - Score Name EE 4180 Test I Test is open book and...

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Score: _________________ Name:_______________________________________________ EE 4180 Test I Test is open book and notes. Place all answers in the spaces provided. 1. (5%) What would happen if you connected a normal logic gate output directly to the data bus? Outputs would be shorted on the data bus - one gate driving high and another low 2. (5%) How can a single SPI bus support independent communication with multiple slave devices? Each SPI device has a Chip enable that turns it on (tri-state outputs on SDO) 3. (5%) Rank the three I/O transfer techniques in order of hardware required when transferring I/O data (list from lowest to highest). Programmed I/O (Polling or Software driven) Interrupt driven I/O DMA 4. (5%) Exactly how would you setup an 8255 with a base address of 0x3E4 for the maximum number of input bits and how many bits would you have? (Include numeric values and operations needed) Set all ports to input by writing 0x9B to port 0x3E7- 3 8-bit ports so 24 input bits total 5. (10%) The PCI signal __ Frame ____ = ________ 1 _______ during clock cycle __ n-1 _(# ), would indicate that a PCI burst of n cycles is ending. The first clock cycle of the PCI transfer is 1(i.e.not 0). 6. (5%) A ___ SOPC _______( acronym ) system consists of embedded system built using a large FPGA with a processor core and perhaps one or two external memory chips. FPGA logic can be used to build custom hardware. 7. (5%) In VHDL, exactly what is needed for an I/O output port to save the data bus value and how do you generate it?
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