Lab 2.pdf - Lab 2 \u2013 Construction of Half-Adder and Full-Adder by using Logic Gate I Introduction 1 Activity \u2022 \u2022 \u2022 Implementing and simulating

Lab 2.pdf - Lab 2 – Construction of Half-Adder and...

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Lab 2 Construction of Half-Adder and Full-Adder by using Logic Gate I. Introduction 1. Activity Implementing and simulating the operation of half-adder Implementing and simulating the operation of 1-bit full-adder Implementing and simulating of 4-bits parallel adder 2. Theory In the digital world, half adder and full adder are the combinational circuits which are designed to perform addition of input variables. Adders are an important electronic device found in the computer. They are also found in many types of numeric data processing system. II. Lab Experiment 1. Half Adder Half adder is a combinational circuit that performs the addition of 2 bits, this circuit needs two binary inputs and two binary outputs Practice a. Implementing this half-adder from both formula by using logic gate Depend on the formula, we get the logic gate as following: b. Using truth table to verify the operation.
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Half adder truth table: c.
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  • Fall '17
  • tola
  • Addition, Logic gate, Binary-coded decimal

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