Fall1998-prerequisite quiz - University of California...

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University of California, Berkeley College of Engineering Computer Science Division — EECS Fall 1998 J. D. Kubiatowicz Prerequisite Quiz September 2, 1998 CS252 Graduate Computer Architecture You are allowed to use a calculator and one 8.5” x 11” double-sided page of notes. Show your work on all problems. Good luck! Your name: SOLUTION SET SID number: Email address: 1 2 3 Pass Take next time
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2 Question 1 Below is a series of memory read references sent to a cache. The cache holds 32 bytes total with 2-byte blocks, is 2-way set associative, and uses a least-recently-used replacement policy. Assume the cache is initially empty. Classify each memory reference as a hit or a miss. Identify each cache miss as a compulsory miss or a conflict miss. One example is shown below. Blank working space is available on the next page. Byte address Hit/Miss? Miss Type 1 miss compulsory 19 miss compulsory 10 miss compulsory 30 miss compulsory 42 miss compulsory 51 miss compulsory 11 hit 18 hit 27 miss compulsory 34 miss compulsory 43 miss conflict 10 miss conflict 50 miss conflict
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3 Question 2 The code sequence printed below is written in DLX assembly. Assume the code is going to be run on a 5-stage DLX pipeline with a single branch delay slot. 0 add r6, r0, r0 ; reset running sum to zero 4 lw r1, 16(r19) ; load base address from stack 8 lw r2, 32(r19) ; load number of iterations 12 loop: shli r4, r2, #3 ; scale offset by 8 16 addu
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