309722595_Chapter1_5566557174309374.docx - Metal gate...

This preview shows page 1 - 3 out of 6 pages.

Metal gate/ BST /GaAs capacitor: Fabrication and C-V characteristics Chapter 1 Silicon based CMOS scaling and limitations 1.1 Introduction Scaling transistors dimensions has been the main tool to power the development of silicon integrated circuits (ICs). The more an IC is scaled, the higher its packing density and the lower its power dissipation. These have been key in the evolutionary progress leading to today’s computers and communication systems that offer superior performance, dramatically reduced cost per function, and much reduced physical size compared to their predecessors. the dynamic power, dissipated during a switching between logic states, can be ameliorated by limiting the switching frequency f, to which it is proportional (Pdyn= Cv 2 f). The othercomponent – static, leakage power, dissipated while maintaining a logic state, is exponentially sensitive to some of the device parameters and their variability, as well as to non-scaling factors. Leakage power dissipation is time invariant and now poses the most significant scaling limit. According to International Technology Roadmap for Semiconductor (ITRS) 1.2 Device Scaling and Power Dissipation The primary goal of CMOS scaling is reduction of the cost per functional power, by increasing the integration density of on-chip components. The elaboration of constant field scaling rules entails concomitant performance and power consumption improvements, which have shaped the evolution of silicon technology [1]. The concept of device scaling is illustrated in Figure 1.1. In constant field scaling, the physical dimensions of the device (gate
Image of page 1

Subscribe to view the full document.

Metal gate/ BST /GaAs capacitor: Fabrication and C-V characteristics length L G and width W G , oxide thickness t OX , and junction depth Xj), and the supply and threshold voltages (V DD and V T , respectively), are reduced by the same factor, a > 1, so that the two-dimensional pattern of the electric field is maintained constant, while circuit density increases by a 2 . This implies that the depletion width (W D ) must also be reduced by the same amount, which is achieved by increasing the substrate doping N B by a. Consequently, both the gate capacitance (C = L G W G 0 /tox ) and the drain saturation current (ID,sat) are scaled down by a. The saturation current determines the transistor intrinsic switching delay t CV DD /I D ,sat, which is thus reduced by a, leading to a performance improvement. At the same time, the power dissipation (P ID,satVDD) is reduced by a2, so that the power density (P/ (LGWG)) remains unchanged. Limitations of SiO 2 : Industry’s acquired knowledge of oxide process control, has helped the continued use of SiO2 for over 30 years in CMOS technology. The use of amorphous, thermally grown SiO2 as a gate dielectric provides thermodynamically and electrically stable, high-quality Si–SiO2 interface with superior electrical isolation properties. In advanced integrated devices, the SiO2 gate dielectrics are produced with charge densities of 10 10 /cm2, mid-gap interface state densities of 10 10 /cm2, and dielectric strengths of 15 MV/cm [1]. Unacceptably high gate
Image of page 2
Image of page 3

{[ snackBarMessage ]}

What students are saying

  • Left Quote Icon

    As a current student on this bumpy collegiate pathway, I stumbled upon Course Hero, where I can find study resources for nearly all my courses, get online help from tutors 24/7, and even share my old projects, papers, and lecture notes with other students.

    Student Picture

    Kiran Temple University Fox School of Business ‘17, Course Hero Intern

  • Left Quote Icon

    I cannot even describe how much Course Hero helped me this summer. It’s truly become something I can always rely on and help me. In the end, I was not only able to survive summer classes, but I was able to thrive thanks to Course Hero.

    Student Picture

    Dana University of Pennsylvania ‘17, Course Hero Intern

  • Left Quote Icon

    The ability to access any university’s resources through Course Hero proved invaluable in my case. I was behind on Tulane coursework and actually used UCLA’s materials to help me move forward and get everything together on time.

    Student Picture

    Jill Tulane University ‘16, Course Hero Intern