High-Level design and FPGA

Computer Organization and Design: The Hardware/Software Interface

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CS152 Computer Architecture and Engineering Lecture 5 High-Level Design FPGAs/Vertex-E Chipset February 9, 2004 John Kubiatowicz (www.cs.berkeley.edu/~kubitron) lecture slides: http://www-inst.eecs.berkeley.edu/~cs152/ 2/9/034 ©UCB Spring 2004 CS152 / Kubiatowicz Lec5.2 Review: Elements of the Design Process ° Divide and Conquer (e.g., ALU) • Formulate a solution in terms of simpler components. • Design each of the components (subproblems) ° Generate and Test (e.g., ALU) • Given a collection of building blocks, look for ways of putting them together that meets requirement ° Successive Refinement (e.g., multiplier, divider) • Solve "most" of the problem (i.e., ignore some constraints or special cases), examine and correct shortcomings. ° Formulate High-Level Alternatives (e.g., shifter) • Articulate many strategies to "keep in mind" while pursuing any one approach. ° Work on the Things you Know How to Do • The unknown will become “obvious” as you make progress. 2/9/034 ©UCB Spring 2004 CS152 / Kubiatowicz Lec5.3 Review: ALU Design ° Bit-slice plus extra on the two ends ° Overflow means number too large for the representation ° Carry-look ahead and other adder tricks ALU0 a0 b0 cin co s0 ALU31 a31 b31 cin co s31 B 32 signed-arith and cin xor co A M 4 C/L to produce select, comp, c-in Ovflw S 2/9/034 ©UCB Spring 2004 CS152 / Kubiatowicz Lec5.4 Review: Carry Look Ahead (Design trick: peek) A0 B0 A1 B1 A2 B2 A3 B3 S S S S G P G P G P G P C1 = G0 + C0 P0 C2 = G1 + G0 P1 + C0 P0 P1 C3 = G2 + G1 P2 + G0 P1 P2 + C0 P2 G C4 = . . . P A B C-out 0 0 0 “kill” 0 1 C-in “propagate” 1 0 C-in “propagate” 1 1 1 “generate” G = A and B P = A xor B C0 = Cin
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2/9/034 ©UCB Spring 2004 CS152 / Kubiatowicz Lec5.5 Review: Design Trick: Guess (or “Precompute”) n-bit adder n-bit adder CP(2n) = 2*CP(n) n-bit adder n-bit adder n-bit adder 0 CP(2n) = CP(n) + CP(mux) 1 Carry-select adder Cout 2/9/034 ©UCB Spring 2004 CS152 / Kubiatowicz Lec5.6 Why should you keep a design notebook? ° Keep track of the design decisions and the reasons behind them • Otherwise, it will be hard to debug and/or refine the design • Write it down so that can remember in long project: 2 weeks ->2 yrs • Others can review notebook to see what happened ° Record insights you have on certain aspect of the design as they come up ° Record of the different design & debug experiments • Memory can fail when very tired ° Industry practice: learn from others mistakes 2/9/034 ©UCB Spring 2004 CS152 / Kubiatowicz Lec5.7 Why do we keep it on-line? ° You need to force yourself to take notes • Open a window and leave an editor running while you work 1) Acts as reminder to take notes 2) Makes it easy to take notes • 1) + 2) => will actually do it ° Take advantage of the window system’s “cut and paste” features ° It is much easier to read your typing than your writing ° Also, paper log books have problems • Limited capacity => end up with many books • May not have right book with you at time vs. networked screens • Can use computer to search files/index files to find what looking for 2/9/034 ©UCB Spring 2004
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This note was uploaded on 01/29/2008 for the course CS 152 taught by Professor Kubiatowicz during the Spring '04 term at Berkeley.

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High-Level design and FPGA - Review Elements of the Design...

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