Chapter 2: Computer-System Structures Computer System Architecture Computer System Operation I/O Structure, Interrupts Storage Structure Storage Hierarchy, Caching Hardware Protection
Computer-System Architecture memory controller system bus A general purpose computer-system consists of one or more CPUs and a number of device controllers that are connected through a common bus that provides access to a shared memory. Each device controller is in charge of a specific type of device (for example, disk drives, audio devices or video displays).
Computer-System Operation Device controllers and the CPU can execute concurrently (in parallel) , competing for memory. Memory controller synchronize access to the memory. Each device controller is responsibe from a particular device type. Each device controller has a local buffer. Input/Output is from the device to local buffer of device controller. After transfering device controller informs CPU that it has finished its operation(i.e. read request) by causing an interrupt (a signal that shows occurance of an event). CPU moves data from main memory to local buffers or from local buffers to main memory . Note: Operating Systems have a device driver for each device controller. Device driver provides an interface between rest of the OS and the device.
Common Functions of Interrupts Interrupt, transfers control to the appropriate interrupt service routine (responsible for dealing with the interrupt), through the interrupt vector , which contains the starting addresses of all the service routines for the various devices. Interrupt architecture must save the address of the interrupted instruction (loaded into the program counter). Incoming interrupts are disabled while another interrupt is being processed to prevent a lost interrupt , so any incoming interrupts are delayed until operating system is done with the current one; then, interrupts are enabled . A trap or exception is a software-generated interrupt caused either by an error in the program or a request from a user program.
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- Fall '19
- Interrupt, Computer data storage, Interrupt handler