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Class Reader - Who am I Professor John...

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CS162 Operating Systems and Systems Programming Lecture 1 What is an Operating System? August 27 th , 2007 Prof. John Kubiatowicz http://inst.eecs.berkeley.edu/~cs162 Lec 1.2 8/27/07 Kubiatowicz CS162 ©UCB Fall 2007 Who am I? Professor John Kubiatowicz (Prof “Kubi”) Background in Hardware Design » Alewife project at MIT » Designed CMMU, Modified SPAR C processor » Helped to write operating system Background in Operating Systems » Worked for Project Athena (MIT) » OS Developer (device drivers, network file systems) » Worked on Clustered High-Availability systems (CLAM Associates) Peer-to-Peer » OceanStore project – Store your data for 1000 years » Tapestry and Bamboo – Find you data around globe Quantum Computing » Well, this is just cool, but probably not apropos Lec 1.3 8/27/07 Kubiatowicz CS162 ©UCB Fall 2007 Goals for Today What is an Operating System? And – what is it not? Examples of Operating Systems design Why study Operating Systems? Oh, and “How does this class operate?” Interactive is important! Ask Questions! Note: Some slides and/or pictures in the following are adapted from slides ©2005 Silberschatz, Galvin, and Gagne. Many slides generated from my lecture notes by Kubiatowicz. Lec 1.4 8/27/07 Kubiatowicz CS162 ©UCB Fall 2007 Rapid Underlying Technology Change “Cramming More Components onto Integrated Circuits” Gordon Moore, Electronics, 1965
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Lec 1.5 8/27/07 Kubiatowicz CS162 ©UCB Fall 2007 Computing Devices Everywhere Lec 1.6 8/27/07 Kubiatowicz CS162 ©UCB Fall 2007 Computer System Organization Computer-system operation One or more CPUs, device controllers connect through common bus providing access to shared memory Concurrent execution of CPUs and devices competing for memory cycles Lec 1.7 8/27/07 Kubiatowicz CS162 ©UCB Fall 2007 Functionality comes with great complexity! Proc Caches Busses Memory I/O Devices: Controllers adapters Disks Displays Keyboards Networks Pentium IV Chipset Lec 1.8 8/27/07 Kubiatowicz CS162 ©UCB Fall 2007 Sample of Computer Architecture Topics Instruction Set Architecture Pipelining, Hazard Resolution, Superscalar, Reordering, Prediction, Speculation, Vector, Dynamic Compilation Addressing, Protection, Exception Handling L1 Cache L2 Cache DRAM Disks, WORM, Tape Coherence, Bandwidth, Latency Emerging Technologies Interleaving Bus protocols RAID VLSI Input/Output and Storage Memory Hierarchy Pipelining and Instruction Level Parallelism Network Communication Other Processors
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Lec 1.9 8/27/07 Kubiatowicz CS162 ©UCB Fall 2007 Example: Some Mars Rover Requirements Serious hardware limitations/complexity: 20Mhz powerPC processor, 128MB of RAM cameras, scientific instruments, batteries, solar panels, and locomotion equipment Many independent processes work together Can’t hit reset button very easily!
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