Lecture 2.pdf - Lecture No 2 CS330 Operating System 1 Topics to be covered \u2756Interrupts \u2756Operating System Task \u2756Computer Organization CS330

Lecture 2.pdf - Lecture No 2 CS330 Operating System 1...

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Lecture No 29/11/2019CS330 Operating System1
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Topics to be coveredInterruptsOperating System TaskComputer Organization9/11/2019CS330 Operating System2
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3Hardware interruptsWhen interrupt occurs, hardware does the following: CPU is interruptedat that time application code or kernel code might be runningregisters and the program counter saved in RAM to preserve CPU stateCPU starts running the respective Interrupt Service Routing (ISR) (kernel routine)ISR is found through interrupt vector (table containing addresses of ISRs)9/11/2019CS330 Operating System
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4Software interruptsRunning application software may generate interrupts as well. They are called software interrupts (also called traps)1.exceptions (caused by errors)2.system calls (service request)trapor syscallinstruction is usedAn operating system (kernel) is interrupt-driven (event driven)9/11/2019CS330 Operating System
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Interrupt-Driven OS9/11/2019CS330 Operating System5Kernel CodeDevicesApplications or System Programs running in CPUhardware interruptsoftware interrupt / trap(due to system service requestsor errors)disk, keyboard, timer, network adapter…
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Interrupt HandlingThe operating system preserves the state of the CPU by storing registers and the program counterDetermines which type of interrupt has occurred:pollingvectoredinterrupt systemSeparate segments of code determine what action should be taken for each type of interruptRegisterCPURAMStores[Application in CPU]-interrupt-[Service Routine in CPU]
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Interrupt Timeline
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8Direct Memory Access StructureWith DMA, device controller transfers blocks of datafrom buffer storage directly to main memory without CPU interventionOnly one interrupt is generated per block, rather than the one interrupt per byteDevice ControllerMain MemoryCPUDMA Controller Transfer9/11/2019CS330 Operating System
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I/O StructureAfter I/O starts, control returns to user program only upon I/O completionWait instruction idles the CPU until the next interruptWait loop (contention for memory access)At most one I/O request is outstanding at a time, no simultaneous I/O processingAfter I/O starts, control returns to user program without waiting for I/O completionSystem call request to the OS to allow user to wait for I/O completionDevice-status table contains entry for each I/O device indicating its type, address, and stateOS indexes into I/O device table to determine device status and to modify table entry to include interrupt
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10How a modern computer works9/11/2019CS330 Operating System
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Computer System Architecture
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12Storage StructureMain memoryCPU can access directlySecondary storageextension of main memory that provides large nonvolatile storage capacityMagnetic disks plattersThe disk controllerdetermines the interaction between the device and the computerSpinningDiskDisk ControllerMainMemoryCPUsecondary storage9/11/2019CS330 Operating System
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  • Spring '19
  • Interrupt, Computer data storage

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