exam1pD.jpeg - University of Florida EEL 3701-Summer 2019 Dr Eric M Schwartz Department of Electrical Computer Engineering Tues 2 July 2019 Page 8/11

# exam1pD.jpeg - University of Florida EEL 3701-Summer 2019...

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Unformatted text preview: University of Florida EEL 3701-Summer 2019 Dr. Eric. M. Schwartz Department of Electrical & Computer Engineering Tues, 2 July 2019 Page 8/11 Exam 1P Restost Not included in It Last Name , First Name [17%] 8. Design a system that "counts" as shown, using the minimum number of flip- 3 min flops necessary. The system must asynchronously go to state "0" when Restart Restart (active-low) goes true. Use a T-FF for the most significant bit of your design, a JK-FF for the least significant bit, and D-FF(s) for any other bits that you think are necessary. Note that the third state has 6 outputs, 378 corresponding to the octal number 378 = 011 1112; therefore this state machine has six outputs: Ys, Y4, ..., Yo. These outputs must be active-low. Note: All the given FFs have asynchronous clear and set inputs as shown. 2 (2%) a) Draw a functional block diagram (showing all the inputs, all the outputs, 4 min and the functional blocks). Put your design in the dashed box with the inputs SET and outputs going into or out of the box, on the left or right, respectively. Inputs This is not a circuit diagram. Outputs Restart i Resant ( L ) T (H ) ys - YS(1 ) CLK i CLK ( H ) Q - Q. YA ya (L ) X3 - 43 (1 ) Comb - Y2LL ) 1 XILL) SET Restor (1 ) yo LL ) T(H ) VCC Comb J (H) (H) -J Q SET K Restar (1) CLR 5 min (7%) b) Complete the next-state truth table (in counting order). Qu Jo Ku X X / 3 O O X / X 0 0 0 E O 0 O O 0 0 O X X XX-ou B of 11...
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