hw6.pdf - UNIVERSITY OF CALIFORNIA BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences Elad Alon Homework#6 Due

# hw6.pdf - UNIVERSITY OF CALIFORNIA BERKELEY College of...

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UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences Elad Alon Homework #6 EECS 150 Due Thursday, October 13, 5pm, 240 Cory drop box. 1. DDCA 3.30 2. DDCA 3.32 3. Timing. Consider the circuit shown here: IN OUT 1 2 3 4 5 6 7 8 A C B D Q F F D Q F F D Q F F Propagation delay for a gate is defined as follows (units in picoseconds): τ p = x + y · f Where f is the fanout of the gate, expressed in number of transistor gate inputs, and x and y are constants. For example, a gate that drives one inverter has f = 2. Similarly, one input of a 2-input NOR gate also contributes f = 2. Note to people who have taken EE141: this is not the f = C out /C in definition of fanout used in EE141. The propagation delay (for both high-to-low and low-to-high transitions) of the inverters are

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• Fall '96
• cs150

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