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University of California at Berkeley
College of Engineering
Dept. of Electrical Engineering and Computer Sciences
EE 105 Midterm 2
Spring 2006
Prof. Ming C. Wu
April 6, 2006
Guidelines
•
Closed book and notes.
•
Two pages of information sheets allowed.
•
Total time = 90 minutes
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(1)
For the circuit shown in Fig. 1, W/L = 2 for both M
1
and M
2
,
no
x
C
μ
= 100
μ
A/V
2
,
λ
= 0.05
V
1
, V
Tn
= 1V, V
DD
= 5V.
a)
[5 pt] Find the DC drain current at M
2
when V
OUT
= 3V. Use
λ
= 0 for this part.
b)
[5 pt] Find the DC gate bias (V
G
) of M
2
such that the DC output voltage V
OUT
= 3V. Use
λ
= 0 for this part.
c)
[5 pt] Draw the smallsignal equivalent circuit. Find the values of all circuit elements in
the small signal circuit (e.g., g
m
, r
0
, …).
d)
[5 pt] Find the voltage gain,
/
Vo
u
t
s
Avv
=
.
e)
[5 pt] Find the output resistance of the circuit (both expression and numeric value).
f)
[5 pt] Find the input resistance, and construct the twoport model of this voltage
amplifier.
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 Spring '06
 MingWu
 Computer Science, Electrical Engineering

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