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Unformatted text preview: Branch: 16%, Load: 15%, Store: 10%, Float Insts: 20%, Integer: 39% Further, through a hardware cache monitor, you measured the following miss rates: • Machine I: Instruction miss rate: 4%; Data miss rate: 20% • Machine II: Instruction miss rate: 2%; Data miss rate: 16% • Machine III: Instruction miss rate: 1.5%; Data miss rate: 14% Finally, the total CPI measured with Machine I is 3.0. 1. Which of these machines spends the most time waiting for memory? Justify your answer: 2. Suppose we increase the associativity of Cache III (keeping the block-size constant). In this new configuration, the instruction miss rate goes to zero. Further, we measure a total CPI of 2.71. What is the data miss rate?...
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- Spring '04
- Computer Architecture, Central processing unit, CPU cache, Instruction miss rate, John Kubiatowicz, Berkeley College of Engineering Computer Science Division