{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

sp99 homequiz 6 solution

Computer Organization and Design: The Hardware/Software Interface

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
1 University of California, Berkeley College of Engineering Computer Science Division EECS Spring 1999 John Kubiatowicz Homework Quiz (HW #6) April 19, 1999 CS152 Computer Architecture and Engineering This quiz covers one of the problems from homework #6. Good Luck! Your Name: Solutions SID Number: Discussion Section: Total: 10/10
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
2 [This page intentionally left blank]
Background image of page 2
3 Cache organization Your company has an application that must be run as fast as possible. The hardware division of your company has come up with three separate first-level cache configurations: Machine I: Direct-mapped with one-word blocks Machine II: Direct-mapped with four-word blocks Machine III: Two-way set associative with four-word blocks For these machines, the cache fill penalty is 4 cycles + 1 cycle for each word. You did some experiments and measured the following instruction mix for the application: Branch: 16%, Load: 15%, Store: 10%, Float Insts: 20%, Integer: 39% Further, through a hardware cache monitor, you measured the following miss rates:
Background image of page 3
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

Page1 / 3

sp99 homequiz 6 solution - University of California...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon bookmark
Ask a homework question - tutors are online