lecture8 - Lecture 8 Scaling Process Variation EECS 312...

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EECS 312 1 Lecture 8: Scaling + Process Variation EECS 312 Reading: 6.2.1 (pgs 250-251), 3.4- 3.5, 5.6
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EECS 312 2 Last Time Unlike inverters, there are multiple charge/discharge paths in complex gates – Must size devices according to worst-case paths, try to balance rise/fall delays – We can “collapse” series and parallel devices into a single effective MOSFET A number of techniques to speed up gates exist – Re-ordering devices, progressive sizing, a few more shown next – Elmore delay concept helps us model gate delays with internal capacitances considered
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EECS 312 3 Lecture Overview Two more techniques to design fast complex gates Scaling theory – Systematic means of shrinking transistors to achieve better performance • Variation – Process, voltage, and temperature fluctuations
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