lecture20 - Lecture 20: Interconnect Parasitics EECS 312...

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EECS 312 1 Lecture 20: Interconnect Parasitics EECS 312 Reading: 4.3.1, 4.3.2
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Last Time EECS 312 2 • Packaging provides an interface from the chip to the external world • To send signals off-chip, we need to drive large capacitances – This is best done by creating a buffer chain where each inverter is ~3-4X larger than its driver – Often called cascaded or tapered buffer – Even on-chip wires can have large capacitances (pF) that require this technique
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Lecture Overview EECS 312 3 • Simultaneous switching noise (L*di/dt noise) • Brief intro of wiring systems
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Tristate Buffers EECS 312 4 In En En V DD Out V DD In En En Out Useful for signals with multiple drivers 2 nd implementation is better in some cases b/c no series connected devices in output stage
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L di/dt noise EECS 312 5 C L V’ DD V DD L i ( t ) V out V in GND ’ L Significant inductance due to packaging between the actual power supply and the gates themselves Large current draws across this L Æ voltage drop Often called simultaneous switching noise (SSN) since a lot of simultaneous switching will increase di/dt
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SSN Analysis EECS 312 6
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EECS 312 7 Voltage waveforms due to SSN Ground bounce shown at left (GND > 0V) How to limit: 1) Use packaging with small inductance 2) Slow down transitions at I/O pads (reduce di/dt) 3) Low-swing I/O – incompatible with external chips (usually I/O voltage > regular voltage) 8 4 1 active driver time Voltage 0V
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lecture20 - Lecture 20: Interconnect Parasitics EECS 312...

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