lecture22 - Lecture 22: Interconnect Modeling EECS 312...

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11/25/03 EECS 312 1 Lecture 22: Interconnect Modeling EECS 312 Reading: 4.3.2 (ignore skin effect), 4.4 (ignore 4.4.5), 9.3.3
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Last Time 11/25/03 EECS 312 2 • Wire resistivity gets worse as wires get smaller (reverse scaling, different than device delay) • Lumped wire delay overestimates actual delay (distributed) – Because the entire capacitance is NOT charged through the full wire resistance • Wire RC delay increases quadratically with line length as both R and C rise linearly – This has implications on how to reduce RC delay – Repeaters are uniformly inserted to split the line into smaller delays, creating a linear dependence
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Cross-sectional view 11/25/03 EECS 312 3 W S C a C a C v Ground Plane T H C c C c A quiet victim wire is imposed upon by one or more adjacent aggressor wires that are switching rapidly Charge injected across Cc results in a temporary (in static logic) glitch in voltage from the supply rail at the victim Dynamic logic is more susceptible since it’s non-restoring
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11/25/03 EECS 312 4 High level view of crosstalk noise
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Noise Pulses can be large 11/25/03 EECS 312 5
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11/25/03 EECS 312 6 Capacitive Crosstalk: Simplest Model X Y V X C XY C Y Victim line is Y, Aggressor is X
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lecture22 - Lecture 22: Interconnect Modeling EECS 312...

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