Computer Organization and Design: The Hardware/Software Interface

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
1 University of California, Berkeley College of Engineering Computer Science Division EECS Fall 1999 John Kubiatowicz Homework Quiz (HW #5) SOLUTIONS October 27, 1999 CS152 Computer Architecture and Engineering This quiz covers one of the problems from homework #5. Good Luck! Your Name: SID Number: Discussion Section: Total:
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
2
Background image of page 2
3 In problem 6.27, you were asked which stage branch decisions must be made to reduce the branch delay to a single cycle. 1. In which stage must branch decisions be made in order to support only one branch delay slot? Justify your answer. Branch decisions must occur in the ID stage. This is most easily seen by assuming a forward dependency between the ID stage and a fetch two instructions later: FDEM W W W 2. Figure 6.51 from one of the printings of the book is reproduced on the previous page. Consider the following instruction sequence: sub $2, $4, $5 beq $2, $3, somewhere Why doesn’t this code sequence work properly on this hardware (this is a bug in the book!)?
Background image of page 3
This is the end of the preview. Sign up to access the rest of the document.

Page1 / 3

fa99 homequiz 5 solution - University of California,...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online