Computer Organization and Design: The Hardware/Software Interface

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
1 University of California, Berkeley College of Engineering Computer Science Division EECS Fall 1999 John Kubiatowicz Homework Quiz (HW #5) October 27, 1999 CS152 Computer Architecture and Engineering This quiz covers one of the problems from homework #5. Good Luck! Your Name: SID Number: Discussion Section: Total:
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 2
3 In problem 6.27, you were asked which stage branch decisions must be made to reduce the branch delay to a single cycle. 1. In which stage must branch decisions be made in order to support only one branch delay slot? Justify your answer. 2. Figure 6.51 from one of the printings of the book is reproduced on the previous page.
Background image of page 3
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Consider the following instruction sequence: sub $2, $4, $5 beq $2, $3, somewhere Why doesnt this code sequence work properly on this hardware (this is a bug in the book!)? 3. Enhance the data path so that the code sequence of (2) works. Dont worry about control: 4. Suppose that the execute stage of the original hardware (figure 6.51) was the critical path (longest stage). What is the critical path after the modification for question #3 (be careful!)?...
View Full Document

This homework help was uploaded on 01/29/2008 for the course CS 152 taught by Professor Kubiatowicz during the Fall '04 term at University of California, Berkeley.

Page1 / 3

fa99 homequiz 5 - Consider the following instruction...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online