Computer Organization and Design: The Hardware/Software Interface

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Unformatted text preview: 1 University of California, Berkeley College of Engineering Computer Science Division EECS Spring 2001 John Kubiatowicz Homework Quiz (HW #4) SOLUTIONS March 4, 2001 CS152 Computer Architecture and Engineering This quiz covers one of the problems from homework #4. Good Luck! Your Name: SID Number: Discussion Section: Total: 2 The BSET instruction Figure 1: A multicycle data path Figure 1 shows the multicycle datapath from the book. In your homework, you implemented the bcp instruction, which copied a block of words from one location in memory to another. In this problem, we will implement something much simpler, namely the block set instruction: bset $t1,$t2,$t3 {$t1 mem[t3], mem[t3+1] mem[t3+t2]} This instruction takes the value in register $t1, and stores it back to a block of words of memory of size $t2 words, starting at the address in $t3 . The coding of this instruction is as follows: $t1 is in the RT field, $t2 is in the RS field, $t3 is in the RD field. Problem 1a: What changes are required to the datapath for this instruction? Assume that you can use a 32-bit counter with separate load and decrement signals. Only redraw/describe the affected parts of the datapath. Do not change the register file. parts of the datapath....
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This homework help was uploaded on 01/29/2008 for the course CS 152 taught by Professor Kubiatowicz during the Spring '04 term at University of California, Berkeley.

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sp01_homequiz_4_solution - 1 University of California,...

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