sp01_midterm1_solution

# Computer Organization and Design: The Hardware/Software Interface

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1 University of California, Berkeley College of Engineering Computer Science Division EECS Spring 2001 John Kubiatowicz Midterm I SOLUTIONS March 1, 2001 CS152 Computer Architecture and Engineering Your Name: SID Number: Discussion Section: Problem Possible Score 1 20 2 20 3 30 4 30 Total

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3 Problem 1: Performance Problem 1a : Name the three principle components of runtime that we discussed in class. How do they combine to yield runtime? Instruction count, Cycles per instruction (CPI), and clock period (or frequency) Runtime = InstCount × CPI × clockperiod = InstCount × CPI ÷ clock frequency Now, you have analyzed a benchmark that runs on your company’s processor. This processor runs at 300MHz and has the following characteristics: Instruction Type Frequency (%) Cycles Arithmetic and logical 35 1 Load and Store 25 2 Branches 25 3 Floating Point 15 5 Your company is considering a cheaper, lower-performance version of the processor. Their plan is to remove some of the floating-point hardware to reduce the die size. The wafer on which the chip is produced has a diameter of 10cm, a cost of \$2000, and a defect rate of 1 / (cm 2 ). The manufacturing process has an 80% wafer yield and a value of 2 for α . Here are some equations that you may find useful: The current procesor has a die size of 12mm × 12mm. The new chip has a die size of 10mm × 10mm, and floating point instructions will take 13 cycles to execute. Problem 1b : What is the CPI and MIPS rating of the original processor? CPI = (0.35 × 1) + (0.25 × 2) + (0.25 × 3) + (0.15 × 5) = 2.35 MIPS = 300MhZ ÷ CPI = 300MhZ/2.35 = 127.66 MIPS ± ² area die 2 diameter wafer area die diameter/2 wafer dies/wafer u u S ³ u S 2 D ³ ¸ ¹ · ¨ © § D u ´ u area die area unit per defects 1 yield wafer yield die

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4 Problem 1c: What is the CPI and MIPS rating of the new processor? CPI = (0.35 × 1) + (0.25 × 2) + (0.25 × 3) + (0.15 × 13) = 3.55 MIPS = 300MhZ ÷ 3.55 = 84.51 Problem 1d: What is the original cost per (working) processor? ± ² 36 12 2 100 12 2 100 / 2 2 2 » » » » » ¼ » « « « « « ¬ « ³ ¸ ¹ · ¨ © § π π wafer die ± ² 27 . 0 2 2 . 1 1 1 80 . 0 2 2 ¸ ¸ ¹ · ¨ ¨ © § ´ dieYield ± ² 76 . 205 27 . 0 36 2000 ) ( / dieYield wafer die waferCost dieCost Problem 1e: What is the new cost per (working) processor? ± ² 56 10 2 100 10 2 100 / 2 2 2 » » » » » ¼ » « « « « « ¬ « ³ ¸ ¹ · ¨ © § π π wafer die ± ² 36 . 0 2 0 . 1 1 1 80 . 0 2 2 ¸ ¸ ¹ · ¨ ¨ © § ´ dieYield ± ² 21 . 99 36 . 0 56 2000 ) ( / dieYield wafer die waferCost dieCost Problem 1f: Assume that we are considering the other direction of improving the original processor by increasing the speed of floating point. What is the best possible speedup that we could get, and what would the CPI and MIPS rating be of the new processor? The easiest thing to do is use Amdahl’s law: ) 1 ( 1 ) 1 ( 1 f n f f speedup ³ o ´ ³ as n →∞ .
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