Processor Fundamentals Unit 1.4 CPU Architecture 1.4.1: •The modern central processor is based around the Von Neumann model, developed in 1945 •It describes a system where a processor has access to a memory •The memory contains a list of “stored” instructions •These are executed sequentially by the processor •It’s also called the “stored program model”
Processor Fundamentals Unit 1.4 The Von Neumann Model: •The model comprises many components as you have seen •Includes registers for example PC, MDR, MAR •All these have quick access because of their close proximity to the ALU •Memory Address Register (MAR):Holds the address of the data which needs to be processed •Memory Data Register (MDR):Holds the data being transferred to/from memory/ AKA Memory Buffer Register (MBR) •Accumulator (AC/ACC):Register which holds value of intermediate calculations. AKA General Purpose Register (GPR) •Program Counter (PC):Register to store the address of the next instruction to be executed. AKA Sequence Control Register •Current Instruction Register (CIR):Stores the current Instruction as it is processed •Status Register (SR):Contains individual bits which are either 1 or 0. For example, a carry flag could be set to 1 if there is a carry needed in some arithmetic.
Processor Fundamentals Unit 1.4 Arithmetic And Logic Unit (ALU):performs all arithmetic and logic operations •Addition, Subtraction, multiplication, division…: 2+2=4-1=3•Comparisons:10<12? •Logic:AND, OR •Control Unit:Orchestrates all processes using the system clock timing (sync) and control •Instructions are executed on each clock pulse (usually leading or trailing edge) •Pulse begins when value changes, 0 or 1 (or 0V to 5V) •CPU with frequency of 1.3GHz would allow 1,300,000,000 instructions per second to be executed •Hence the clock speed of the CPU is important System Bus: •Obvs, these components need to communicate with each other •Data, instructions, clock pulses could not be acted upon otherwise •We use internal tracking/cabling generally knowns as system bus •Parallel communication – each wire carries a single bit