Ch 5 - Timers-web.pdf - \u2502 Chapter 5\u2502 Timers(web Hui Xie 1 300044 Microcontrollers Overview Structure of Timer0(for timing Structure of

Ch 5 - Timers-web.pdf - │ Chapter 5│ Timers(web Hui Xie...

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1 Hui Xie Timers ( web) Chapter 5
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2 Hui Xie 300044 Microcontrollers Overview Structure of Timer0 (for timing) Structure of Timer2/4/6 (for PWM signal generation ) Register formats and configuration
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3 Hui Xie 300044 Microcontrollers 5.1. Timer0 Operation The Timer0 module is an 8-bit timer/counter. As a timer, it has the following features: • 8-bit timer/counter register (TMR0) • 8-bit prescaler shift register • programmable internal clock source • interrupt generation on overflow
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4 Hui Xie 300044 Microcontrollers 5.1. Timer0 Operation Figure 5-1: A block diagram of the Timer0 module
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5 Hui Xie 300044 Microcontrollers 5.1. Timer0 Operation Figure 5-1: A block diagram of the Timer0 module - prescaler and multiplexer
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6 Hui Xie 300044 Microcontrollers 5.1. Timer0 Operation The Timer0 module can be used as either an 8-bit timer or an 8-bit counter. 8-bit timer mode: Timer0 module increments the value of TMR0 every K*4*Tosc where K is the value of the prescaler and Tosc is clock period ( and 4Tosc is one instruction cycle).
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7 Hui Xie 300044 Microcontrollers 5.1. Timer0 Operation The 8-bit timer mode: clearing the TMR0CS bit of the OPTION_REG register. When TMR0 is written, the increment is inhibited for two instruction cycles immediately following the write. Initial value of TMR0: If TMR0 not loaded,
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8 Hui Xie 300044 Microcontrollers 5.1. Timer0 Operation Prescaler (frequency divider) Prescaler: the PSA bit of the OPTION_REG register Prescaler rate: PS<2:0> bits of the OPTION_REG register The prescaler is not readable or writable. A write to the TMR0 register will clear the prescaler.
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9 Hui Xie 300044 Microcontrollers 5.1. Timer0 Operation Timer0 Interrupt Timer0 will generate an interrupt when the TMR0 register overflows from FFh to 00h. The TMR0IF interrupt flag bit of the INTCON register is set every time the TMR0 register overflows, regardless of whether or not the Timer0 interrupt is enabled. The TMR0IF bit can only be cleared in software. The TMR0IE bit of the INTCON register:
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10 Hui Xie 300044 Microcontrollers 5.1. Timer0 Operation Operation During Sleep Timer0 cannot operate while the MCU is in sleep mode. The contents of the TMR0 register will remain unchanged while the MCU is in sleep mode.
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