Lab1Template_Altera_online.doc - EEE 120 Lab 1 Answer...

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EEE 120Lab 1 Answer Sheet (Online)Half Adder, Full Adder, 4-bit Incrementer and AdderName: ______________________________________ Date: _______________________________________Task 1-1: Build and Test the 1-Bit Half-AdderInclude a picture of your Quartus circuit here:Please comment on the single biggest issue you were facing when designing the circuit.Include a picture of your Quartus simulation (timing diagram) here:1
Did the circuit behave as expected? If no, what was wrong? – Yes (eventually)Please comment on the single biggest issue you were facing when simulating the circuit.Issue: When I attempted to run the analysis and synthesis, I received errors. I named my inputs “input A” and “input B”, that was not allowed. I renamed them A & B and then it worked.Task 1-2: Build and Test a 4-Bit Increment CircuitInclude a picture of your Quartus circuit here:2
Please comment on the single biggest issue you were facing when designing the circuit. - NoInclude a picture of your Quartus simulation (timing diagram) here:3
Did you test all input conditions? Were the results as you expected them to be? If you performed your own test sequence, which tests did you perform and why? The following table is an example of how to describe your test sequence:Test stimulusTest motivation Pass/FailAll inputs 0Check for stuck-at-1 faultsPAll inputs 1Check for OFP1 0 0 0Check for CryP1 on INCAdds one to outputP

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