Lec08IO

Lec08IO - 68HC12 Features 16-bit CPU12 Multiplexed bus...

Info iconThis preview shows pages 1–5. Sign up to view the full content.

View Full Document Right Arrow Icon
ECE 471 8-IO-1 Lecture 8 I/O Configuration Outline Configuration of Port A Configuration of Port B Configuration of Port E Configuration of Port B Configuration of Port AD Configuration of Port T Configuration of Port S Configuration of Port DLC
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
ECE 471 8-IO-2 68HC12 Features 16-bit CPU12 Multiplexed bus – Single chip or expanded Memory – 32-Kbyte FLASH, 32-Kbyte ROM (some members), 768-byte EEPROM, 1-Kbyte RAM with single-cycle access 8-channel, 10-bit analog-to-digital converter (ATD) 8-channel standard timer module (TIM) — some members Enhanced capture timer (ECT) — MC68HC12BE32 only 16-bit pulse accumulator for event counting and time accumulation Pulse-width modulator (PWM) - 8-bit, 4-channel or 16-bit, 2-channel Serial interfaces - Asynchronous and Synchronous serial peripheral J1850 data link communication (BDLC), MC68HC912B32 and MC68HC12BE32 only Controller area network (CAN), MC68HC(9)12BC32 only
Background image of page 2
ECE 471 8-IO-3 68HC12 Features (cont.) Computer operating properly (COP) watchdog timer, clock monitor, and real-time interrupt timer Slow-mode clock divider Up to 63 general-purpose input/output (I/O) lines Single-wire background debug mode (BDM) On-chip hardware breakpoints Many features need some pins on chip Most 68HC12 chip pins can be configured as I/O pins or Other functions The default of most pins is I/O input Configuration can be done using configuration registers
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
ECE 471 8-IO-4
Background image of page 4
Image of page 5
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 01/31/2008 for the course ECE 471 taught by Professor Chien during the Spring '08 term at IUPUI.

Page1 / 27

Lec08IO - 68HC12 Features 16-bit CPU12 Multiplexed bus...

This preview shows document pages 1 - 5. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online