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370L10 - 10 Basic Processor Design Single-Cycle and...

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1 © V. Bertacco & D. Winsor, 2007 The material in this presentation cannot be copied in any form without our written permission Prof. Valeria Bertacco & Prof. Don Winsor EECS 370 – Introduction to Computer Organization – Fall 2007 EECS Department University of Michigan in Ann Arbor, USA 10. Basic Processor Design: Single-Cycle and Multi-Cycle Datapaths LC2Kx Datapath Implementation PC Instruction memory Register file Data memory Control ROM M U X M U X M U X M U X Sign extend + 1 + A L U 3x8 decoder R/W En En Instruction bits 15-0 21-19 18-16 24-22 18-16 2-0
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