lab 5 - The University of Texas at Dallas Computer Science...

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The University of Texas at Dallas Computer Science Department CS2110: Introduction to Digital Systems Laboratory Experiment #5 – Shift Registers, Counters, and Their Architecture 1. Introduction: In Laboratory Exercise # 4, we became familiar with bistable multivibrators, or “flip-flops.” We noted in classroom discussion that the flip-flop (hereafter abbreviated as “ff”) is the basis of many of the subsystems in sequential logic systems such as the computer or the microprocessor. One such device is the latch or register, which is simply a set of FF’s that can store a number of data bits at the same time, such as a byte (8 bits), or a full data “word,” which is normally 32 or 64 bits (i.e., 4 or 8 bytes). In this laboratory we will become familiar with two other devices which are composed of ff’s, and which are very important subsystems in computer architecture: the shift register and the binary counter . Both devices use bistable circuits, which we have learned will maintain either of two states after being set or reset. 2. Goal of this exercise: The purpose of Experiment #5 is to familiarize students with the functionality of the serial-to-parallel shift register and the simple binary counter. After operating the 74LS195 shift register and the 74LS163 binary counter, we will construct very similar devices from D and J-K flip-flops on our prototype boards. 3. Theory of experiment: We have studied the shift register and counter in class. Shift registers are generally used to convert serial data (i.e., data received on a single line, bit- after-bit) to parallel data (i.e., data that may be transmitted on a number of parallel lines, generally referred to as a bus , simultaneously) or parallel to serial data. Binary counters usually count the number of pulses from a clock, or astable (“free running”) multivibrator – they are crucially important in computer systems, which almost always employ sequential logic whose events are controlled by clocks and counters. Both are generally composed of bistable circuits with different combinations of inputs and clocking. Serial-to-parallel shift register : Takes in data serially (bit by bit) and makes it available in parallel, generally to a parallel (multi-wire) data bus. We will study this device today. Parallel-to-serial shift register: Takes in data from a parallel data buss, and shifts it out serially to a one-wire data buss. Not studied today (but see the work assignment at the end of the lab). Binary counter: Counts serial pulses on a “clock line.” May be either “ripple” (each stage output clocks the next input) or synchronous (or “parallel” – all stages clocked in parallel). In order to demonstrate the circuit mechanics of the serial-to-parallel shift register and the simple binary ripple counter, we will build these circuits from “building blocks” of flip-flops.
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This note was uploaded on 07/02/2009 for the course CS 4365 taught by Professor Vincent during the Spring '09 term at Universidad Torcuato Di Tella.

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lab 5 - The University of Texas at Dallas Computer Science...

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