ikiuccevap - UNIVERSITY OF CALIFORNIA College of...

Info icon This preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
Problem 1 – Static Registers, Sizing, and Timing For a particular instance of the register shown in Figure 1, the source driver for input D is an inverter. Assume the cross-coupled inverters are all minimum-sized (Wp=2Wn), Figure 1. Static register. a. Find a sizing constraint on the source inverter and transmission gate that ensures proper functionality for storing a “0” (ignore body effect) (Hint: size the pull- down of the driving inverter the same as the pass-transistor gate). The driving stage and pass transistor must be able to bring the input of the top inverter below its switching point in order to store a zero. During this transition, there is a direct path between VDD and ground through the series combination of the inverter NMOS and pass gate, and the PMOS in the bottom feedback inverter (figure 2b). To simplify the analysis, we assume the PMOS remains fully on (ignore the feedback, which makes our constraint slightly tighter than necessary). Assuming 0.25um technology, and Vdd=2.5, the switching point for the inverter will be Vm=1.25V. Ignoring body effect. UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences Last modified on November 7, 2002 by Henry Jen and Stanley Wang ([email protected]) Borivoje Nikolic Homework #9 EECS 141
Image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Vx Figure 1b. Path of contention. Vx was originally at Vdd and is now pulled down to Vdd/2 I driving stage = I pass transistor = I feedback inverter ,and assume (W/L) driving stage = (W/L) pass transistor The two NMOS transistors can be modeled as one NMOS with twice the length. kp’(W/L) p V dsatp (Vdd-Vtp-|V dsatp |/2) = kn’(W/2L) n V dsatn (Vdd-Vtn-V dsatn /2) (W/L)n / (W/L)p > 0.75, so (W/L) pass transistor = (W/L) driving stage = 2*0.75(W/L) nmos = 1.5(W/L) nmos b. How might you redesign the register to relax the sizing requirement on the driving stage? In order to make the driving stage smaller, we must weaken the feedback inverters.
Image of page 2
Image of page 3
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

What students are saying

  • Left Quote Icon

    As a current student on this bumpy collegiate pathway, I stumbled upon Course Hero, where I can find study resources for nearly all my courses, get online help from tutors 24/7, and even share my old projects, papers, and lecture notes with other students.

    Student Picture

    Kiran Temple University Fox School of Business ‘17, Course Hero Intern

  • Left Quote Icon

    I cannot even describe how much Course Hero helped me this summer. It’s truly become something I can always rely on and help me. In the end, I was not only able to survive summer classes, but I was able to thrive thanks to Course Hero.

    Student Picture

    Dana University of Pennsylvania ‘17, Course Hero Intern

  • Left Quote Icon

    The ability to access any university’s resources through Course Hero proved invaluable in my case. I was behind on Tulane coursework and actually used UCLA’s materials to help me move forward and get everything together on time.

    Student Picture

    Jill Tulane University ‘16, Course Hero Intern