lecture10annotat - 6.012 Microelectronic Devices and...

Info icon This preview shows pages 1–7. Sign up to view the full content.

View Full Document Right Arrow Icon
ve 6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 10-1 Lecture 10 - MOSFET (II) MOSFET I-V Characteristics ( cont. ) October 13, 2005 Contents : 1. The saturation regime 2. Backgate characteristics Reading assignment: Howe and Sodini, Ch. 4, § 4.4 Announcements: Quiz 1: 10/13, 7:30-9:30 PM, (lectures #1-9); open book; must ha calculator. have
Image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 10-2 Key questions How does the MOSFET work in saturation? Does the pinch-off point represent a block to current flow? How come the MOSFET current still increases a bit with V DS in saturation? How does the application of a back bias affect the MOSFET I-V characteristics?
Image of page 2
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 10-3 1. The saturation regime Geometry of problem: n + n + n + p S G D B 0 L depletion region V BS =0 V GS V DS I D I S inversion layer y -t ox 0 x j x Regimes of operation so far ( V BS = 0): Cut-off : V GS < V T , V GD < V T : no inversion layer anywhere underneath gate I D = 0 Linear : V GS > V T , V GD > V T (with V DS > 0): inversion layer everywhere underneath gate W V DS I D = µ n C ox ( V GS V T ) V DS L 2
Image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 10-4 Output characteristics: I D 0 V GS V GS =V T V DS =V GS -V T 0 V DS
Image of page 4
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 10-5 2 Review of Q n , E y , V c , and V GS V c ( y ) in linear regime as V DS increases: |Q n (y)| 0 |E y (y)| 0 V c (y) V DS 0 V GS -V c (y) V GS V T V DS V DS =0 0 0 0 y L L L y y V DS 0 L y C ox (V GS -V T ) local gate overdrive V DS =0 V DS =0 V DS =0 V DS V DS V DS Ohmic drop along channel debiases inversion layer I D rises more slowly with V DS
Image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 10-6 2 Drain current saturation As V
Image of page 6
Image of page 7
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

What students are saying

  • Left Quote Icon

    As a current student on this bumpy collegiate pathway, I stumbled upon Course Hero, where I can find study resources for nearly all my courses, get online help from tutors 24/7, and even share my old projects, papers, and lecture notes with other students.

    Student Picture

    Kiran Temple University Fox School of Business ‘17, Course Hero Intern

  • Left Quote Icon

    I cannot even describe how much Course Hero helped me this summer. It’s truly become something I can always rely on and help me. In the end, I was not only able to survive summer classes, but I was able to thrive thanks to Course Hero.

    Student Picture

    Dana University of Pennsylvania ‘17, Course Hero Intern

  • Left Quote Icon

    The ability to access any university’s resources through Course Hero proved invaluable in my case. I was behind on Tulane coursework and actually used UCLA’s materials to help me move forward and get everything together on time.

    Student Picture

    Jill Tulane University ‘16, Course Hero Intern