CS33-4

CS33-4 - MIPS Computer Architecture CS 33: Computer...

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CS 33: Computer Organization Topic 4: MIPS Computer 9/2008 John A. Rohr All Rights Reserved JAR 4-1 MIPS Computer Architecture
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CS 33: Computer Organization Topic 4: MIPS Computer 9/2008 John A. Rohr All Rights Reserved JAR 4-2 MIPS Computer Architecture MIPS: Microprocessor without Interlocking Pipeline Stages Figure 1-1: Page 2
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CS 33: Computer Organization Topic 4: MIPS Computer 9/2008 John A. Rohr All Rights Reserved JAR 4-3 MIPS Computer Architecture RISC Machine Control Unit (CU) Instruction Register (IR) Arithmetic/Logic Unit (ALU) Program Counter (PC) Register File Memory
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CS 33: Computer Organization Topic 4: MIPS Computer 9/2008 John A. Rohr All Rights Reserved JAR 4-4 MIPS Register File Reg . # Usage zero 0 Constant 0 at 1 Reserved for Assembler v0 2 Return Value v1 3 Return Value a0 4 Function Argument a1 5 Function Argument a2 6 Function Argument a3 7 Function Argument t0 8 Temporary (Caller Saved) t1 9 Temporary (Caller Saved) t2 10 Temporary (Caller Saved) t3 11 Temporary (Caller Saved) t4 12 Temporary (Caller Saved) t5 13 Temporary (Caller Saved) t6 14 Temporary (Caller Saved) t7 15 Temporary (Caller Saved) Reg . # Usage s0 16 Saved Temporary (Callee Saved) s1 17 Saved Temporary (Callee Saved) s2 18 Saved Temporary (Callee Saved) s3 19 Saved Temporary (Callee Saved) s4 20 Saved Temporary (Callee Saved) s5 21 Saved Temporary (Callee Saved) s6 22 Saved Temporary (Callee Saved) s7 23 Saved Temporary (Callee Saved) t8 24 Temporary (Caller Saved) t9 25 Temporary (Caller Saved) k0 26 Reserved for O. S. Kernel k1 27 Reserved for O. S. Kernel gp 28 Pointer to Global Area sp 29 Stack Pointer fp 30 Frame Pointer ra 31 Return Address for Function Calls
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CS 33: Computer Organization Topic 4: MIPS Computer 9/2008 John A. Rohr All Rights Reserved JAR 4-5 MIPS Memory 2 32 Individual byte cells addressable Multiple data cell sizes 8 bits: Byte 16 bits: Half-word 32 bits: Word: All Instructions are words! Accessed by byte address Instructions are word size (32 bits) Actual memory is less than 2 32 bytes
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CS 33: Computer Organization Topic 4: MIPS Computer 9/2008 John A. Rohr All Rights Reserved JAR 4-6 Input and Output Memory-Mapped I/O Only Memory addresses access I/O devices Regular instructions can access I/O I/O area of memory dedicated to I/O Not available as memory Ranges of addresses for specific devices Specific addresses for specific functions
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CS 33: Computer Organization Topic 4: MIPS Computer 9/2008 John A. Rohr All Rights Reserved JAR 4-7 Instruction Names Full Name Multiple word description of operation Used in text Example: Shift Left Logical Mnemonic Word derived from same base as “memory” Short abbreviation of instruction full name Used in assembly language programming Example: sll
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CS 33: Computer Organization Topic 4: MIPS Computer 9/2008 John A. Rohr All Rights Reserved JAR 4-8
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CS33-4 - MIPS Computer Architecture CS 33: Computer...

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