lec23 - 6.012 - Electronic Devices and Circuits Lecture 23...

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Unformatted text preview: 6.012 - Electronic Devices and Circuits Lecture 23 - The Cascode and the A741 - Outline Announcements Handouts - Lecture Outline and Summary; Cascode Design Problem - Due tomorrow Review - Bounding mid-band OCTC/SCTC methods: t i = R i C i ; estimate t HI as S t i (Largest t dominates) w i = 1/R i C i ; estimate w LO as Sw j (Largest w dominates) - The Miller effect: why C m and C gd are so important The concept: a capacitor shunting a gain stage looks larger by (1 + |A v |) Examples: the Miller effect magnifies C m and C gd in CE/S stages no significant Miller effect impact on CB/G or E/SF stages the Miller effect is used to stabilize the m A 741 The Marvelous cascode Concept and w HI : getting larger bandwidth from CE + CB Output resistance The costs The A741 A nice context in which to look at: 1) applying the Miller effect; 2) a bipolar chip; 3) dissecting a real multistage amplifier; 4) seeing some novel circuits in use (cascode, Darlington, push-pull, current mirror load, Widlar current source) Clif Fonstad, 11/03 Lecture 23- Slide 1 Q 16 Q 17- 1.5V +- V BIASx + v ins5 v OUT +- +- V BIASy + v ins5 + 1.5V Fall 2003 Design Problem Analysis The fourth stage voltage gain: This follower stage sees a large load and has a voltage gain that is essentially 1: 1 A v 4 The fifth stage voltage gain: Because this follower sees a load of only 100 Ohms (R L ) its gain may be less than R L one. To analyze it we begin by recognizing that Q 16 and Q 17 both see the same input signal, albeit riding on different DC biases: The L.E.C. is: And the gain is: (g + g )v m16 m17 + + g 16 v g o16 [ g p 16 + g p 17 + g m 16 + g m 17 ] R L + g 17...
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This note was uploaded on 07/20/2009 for the course CSAIL 6.012 taught by Professor Prof.cliftonfonstadjr. during the Fall '03 term at MIT.

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lec23 - 6.012 - Electronic Devices and Circuits Lecture 23...

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