lec24 - 6.012 Electronic Devices and Circuits Lecture 24...

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6.012 - Electronic Devices and Circuits Lecture 24 - Intrinsic Limits of Transistor Speed -Outline Announcements Handouts - Lecture Outline and Summary Problem Set No. 10 - Don't forget, there is one, and it is due Friday! Final - Monday, Dec. 15, 9:00 am -noon, duPont Gymnasium Review - Dealing with shunting feedback capacitances: C and C gd The Miller effect: any C bridging a gain stage looks bigger at the input The Marvelous cascode: CE/S-CB/G (E/SF-CB/G work, too -see A741 ) large bandwidth, large output resistance used in gain stages and in current sources Intrinsic high frequency limits for transistors General approach Limits for BJTs: Metrics Design lessons Limits for MOSFETs: Metric D esign lessons Clif Fonstad, 12/03 Lecture 24 - Slide 1

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Intrinsic HI 's for the BJTs - short-circuit current gain g + - v i b g m v g o i c C C c b e e The common-emitter short-circuit current gain is: () i c () [ g m jC ] j j = sc i b { g + + C ]} j [ there is one pole, call it p , and one zero, : z g g m = , = p z [ C + C ] C Of these two, p is much smaller and this is the 3dB point of the common-emitter short-circuit current gain. We give it the name
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This note was uploaded on 07/20/2009 for the course CSAIL 6.012 taught by Professor Prof.cliftonfonstadjr. during the Fall '03 term at MIT.

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lec24 - 6.012 Electronic Devices and Circuits Lecture 24...

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