lec10 - 6.012 Microelectronic Devices and Circuits Fall...

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Unformatted text preview: 6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 101 Lecture 10 MOSFET (II) MOSFET IV Characteristics ( cont. ) October 13, 2005 Contents : 1. The saturation regime 2. Backgate characteristics Reading assignment: Howe and Sodini, Ch. 4, 4.4 Announcements: Quiz 1: 10/13, 7:309:30 PM, (lectures #19); open book; must have calculator. 6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 102 Key questions How does the MOSFET work in saturation? Does the pinchoff point represent a block to current ow? How come the MOSFET current still increases a bit with V DS in saturation? How does the application of a back bias affect the MOSFET IV characteristics? 6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 103 1. The saturation regime Geometry of problem: n + n + n + p S G D B 0 L depletion region V BS =0 V GS V DS I D I S inversion layer y -t ox 0 x j x Regimes of operation so far ( V BS = 0): Cutoff : V GS < V T , V GD < V T : no inversion layer anywhere underneath gate I D = 0 Linear : V GS > V T , V GD > V T (with V DS > 0): inversion layer everywhere underneath gate W V DS I D = n C ox ( V GS V T ) V DS L 2 6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 104 Output characteristics: I D 0 V GS V GS =V T V DS =V GS-V T 0 V DS 6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 105 Review of Q n , E y , V c , and V GS V c ( y ) in linear regime as V DS increases: 0 C ox (V GS-V T ) V DS =0 V DS |Q n (y)| 0 L y 0 V DS =0 V DS |E y (y)| y L V DS V DS V DS =0 0 L y 0 V c (y) V GS V T V DS 0 L y local gate overdrive V DS =0 V DS V GS-V c (y) Ohmic drop along channel debiases inversion layer I D rises more slowly with V DS 6.012 Microelectronic Devices and Circuits Fall 2005 6....
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This note was uploaded on 07/20/2009 for the course ELECTRICAL 6.012 taught by Professor Prof.jesúsdelalamo during the Fall '05 term at MIT.

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lec10 - 6.012 Microelectronic Devices and Circuits Fall...

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