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lecture8annotat - 6.012 Microelectronic Devices and...

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6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-1 Lecture 8 - PN Junction and MOS Electrostatics (V) Electrostatics of Metal-Oxide-Semiconductor Structure ( cont. ) October 4, 2005 Contents : 1. Overview of MOS electrostatics under bias 2. Depletion regime 3. Flatband 4. Accumulation regime 5. Threshold 6. Inversion regime Reading assignment: Howe and Sodini, Ch. 3, §§ 3.8-3.9 Announcements: Quiz 1: 10/13, 7:30-9:30 PM, (lectures #1-9); open book; must have calculator.
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6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-2 Key questions Is there more than one regime of operation of the MOS structure under bias? What does ”carrier inversion” mean and what is the big deal about it? How does the carrier inversion charge depend on the gate voltage?
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6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-3 1. Overview of MOS electrostatics under bias x 0 -t ox "metal" (n + polySi) oxide semiconductor (p type) contact contact V GB + - Application of bias: built-in potential across MOS structure increases from φ B to φ B + V GB oxide forbids current flow J = 0 everywhere in semiconductor need drift=-diffusion in SCR must maintain boundary condition at Si/SiO 2 inter- face: E ox /E s 3 How can this be accommodated simultaneously? quasi-equilibrium situation with potential build up across MOS equal to φ B + V GB
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relations in 6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-4 Important consequence of quasi-equilibrium: Boltzmann apply semiconductor Boltzmann relations apply in [they were derived starting from J e = J h = 0] n i e ( x ) /kT n ( x ) = p ( x ) = n i e ( x ) /kT and 2 np = n at every x i [not the case in p-n junction or BJT under bias]
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6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-5 2. Depletion regime
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