lab1 - Massachusetts Institute of Technology Department of...

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Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6.111 - Introductory Digital Systems Laboratory (Spring 2004) Laboratory 1 - Logic Analyzers, Digital Oscilloscope, and PALs Issued: February 4, 2004 Checkoff and Report Due: February 20, 2004 Introduction This lab assignment introduces you to important tools and devices that we will be using through- out the term. You will be introduced to the following: HP 1662AS, a multichannel logic analyzer with an integrated two-channel digital scope. 74LS TTL series chips, including the ‘00, ‘04, ‘163, ‘393, ‘74 74HC00, a CMOS NAND gate 1.8432 MHz Crystal Oscillator Warp 6.3 for Windows (for Verilog programming) PAL programmers to program a 22V10 Programmable Array Logic (PAL) TTL and CMOS voltage levels Karnaugh Maps and Boolean Algebra Simple Verilog Latches and Flip-flops, Simple Sequential and asynchronous circuits 7-segment Display The following are relevant handouts that you should be using in conjunction with this lab: Lectures 1-5 •S a f e t y M e m o How to use the Logic Analyzer/Oscilloscope Procedure This lab is divided into several exercises to guide you through the design, construction, and debugging process. You will be asked to wire circuits for many of the exercises. Save all of these
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Exercise 1: TTL/CMOS Static Electrical Characteristics The logic values of 1 and 0 are represented by voltage levels in the hardware logic implementa- tion. The voltage levels and other electrical characteristics are not standardized from one logic family to another. 6.111 will use both TTL (Transistor-Transistor Logic) and CMOS (Comple- mentary Metal-Oxide Semiconductor) logic. The voltage ranges for the two logic families are not compatible. In this exercise, you will first measure the electrical characteristics of a TTL and CMOS gate using the circuit in Figure 1. Wire up this circuit using a 74LS00 part. Do not forget to wire power and ground! These connections are usually omitted from logic diagrams, as the power and ground of the 74LS series are generally the top-right and bottom-left pin, respectively. Typically, the top of the chip has a small semi-circular cutout, or a white dot next to pin 1. Ground the input of the inverter (the first NAND) and measure the output voltage using the oscil-
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This note was uploaded on 07/21/2009 for the course EECS 6.111 taught by Professor Prof.ananthachandrakasan during the Spring '04 term at MIT.

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lab1 - Massachusetts Institute of Technology Department of...

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