ECE442_Sample_Final_1

ECE442_Sample_Final_1 - ECE442 Sample Final 1 1. Consider a...

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ECE442 Sample Final 1 1. Consider a CMOS inverter with the following device characteristics: NMOS: K n ' = 50 µ A/v 2 , V tn = 0.8 volts PMOS: K p ' = 50 µ A/v 2 , V tp = -1 volts The power supply V DD = 5 volts. Both transistors have channel length of L n = L p = 1 µ m. The total output load capacitor is 2 pF which is independent of the transistors dimensions. a) Determine the channel width of the NMOS and the PMOS transistors. Such that the switching threshold voltage V M = 2.2 volts and the output rise time is 5 nsec. b) Calculate the average propagation delay 2. Design using an 8-transistor CMOS transmission gate implementation of the XOR. Repeat using a 6-transistor CMOS transmission gate implementation 3. Design the following Boolean function using transmission gates F = AB + A'C' + AB'C 4. Consider the following dynamic gate logic. Suppose the pre-charge transistor was chosen such that node X is guaranteed to be charged to V DD . All NMOS transistors have W/L = 20. The pre-charge PMOS has
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This note was uploaded on 07/24/2009 for the course ECE 442 taught by Professor Dr during the Fall '07 term at CSU Northridge.

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ECE442_Sample_Final_1 - ECE442 Sample Final 1 1. Consider a...

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