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Memory and Caches

Memory and Caches - 13-1 Memory and Caches 13-1 See also...

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13-1 13-1 Memory and Caches See also cache study guide. Contents Supplement to material in section 5.2. Includes notation presented in class. 13-1 EE 4720 Lecture Transparency. Formatted 12:18, 4 December 2006 from lsli13. 13-1
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13-2 13-2 Memory Basics and Terminology In essence a memory system is quite simple: CPU Address Data in Data Out Memory Address Retrieve or store data at specified effective address. In practice its complexity can rival that of the processor. 13-2 EE 4720 Lecture Transparency. Formatted 12:18, 4 December 2006 from lsli13. 13-2
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13-3 13-3 Terminology Address Space: The set of addresses defined in the ISA. Address Space Size: The (maximum) number of bits needed to represent an address. Symbol used in class: a . Typical address space sizes: DLX, MIPS32, Sun SPARC V8, IA-32, and other older ISAs, a = 32, Itanium, MIPS64, DEC Alpha, Sun SPARC V9, a = 64. 13-3 EE 4720 Lecture Transparency. Formatted 12:18, 4 December 2006 from lsli13. 13-3
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13-4 13-4 Typical Address Spaces Real Address Space: a.k.a. Physical Address Space The set of addresses used by main memory. Real Address: An address in a real address space. Given a real address, can open up computer’s case and point to data. Virtual Address Space: The set of addresses usually used by programs. Physical location used for a virtual address can change as a program runs. Given a virtual address, cannot point to a chip and say data is there ... ... since location of data is not pre-determined and location can change. 13-4 EE 4720 Lecture Transparency. Formatted 12:18, 4 December 2006 from lsli13. 13-4
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13-5 13-5 Usage of Virtual Address Instructions use virtual addresses. Memory devices use physical addresses. Hardware between CPU and memory translates from virtual to physical address. Depending on design, cache uses virtual or physical addresses. Each process (running program) gets its own virtual address space. Processor can switch between virtual and real addresses. Only real addresses used in this set of notes. 13-5 EE 4720 Lecture Transparency. Formatted 12:18, 4 December 2006 from lsli13. 13-5
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13-6 13-6 Terminology Character: What a memory address refers to; defined by the ISA. Number of bits in a character denoted c In most systems, c = 8 bits and called a byte. 13-6 EE 4720 Lecture Transparency. Formatted 12:18, 4 December 2006 from lsli13. 13-6
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13-7 13-7 Bus Width: The number of bits brought into the processor in a single memory access. Symbol used in class w . The number of bits accessed by an instruction may be less, the other bits are ignored. This is an implementation feature. In any reasonable system w is a multiple of c . Typical values, w = 64 bits. 13-7 EE 4720 Lecture Transparency. Formatted 12:18, 4 December 2006 from lsli13. 13-7
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13-8 13-8 Example ! Data in memory: ! 0x1000: 5, 0x1001: 6, 0x1002: 7, 0x1003: 8. ! 0x1004 to 0x1007: 0x11111111 addi r1, r0, 0x1000 lb r10, 0(r1) ! Eff. addr = 0x1000, r10 <- 0x00000005 lb r11, 1(r1) ! Eff. addr = 0x1001, r11 <- 0x00000006 lb r12, 2(r1) ! Eff. addr = 0x1002, r12 <- 0x00000007 lb r13, 3(r1) ! Eff. addr = 0x1003, r13 <- 0x00000008 lh r15, 0(r1) ! Eff. addr = 0x1000, r15 <- 0x00000506 lh r16, 2(r1) ! Eff. addr = 0x1002, r16 <- 0x00000708 lw r20, 0(r1) ! Eff. addr = 0x1000, r20 <- 0x05060708 13-8 EE 4720 Lecture Transparency. Formatted 12:18, 4 December 2006 from lsli13.
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